digital circuit

  1. Sud_09

    Hardware Interlock Circuit - oscillations seen when both input are in phase

    I was reading this discussion - Interlock Discussion, because I want to design a Half Bridge MOSFET driver, with interlock. I recreated both the circuits in LTspice that were recommended The logic I want is - In1 In2 Op 0 0 both OFF 1 0 Up MOS ON, BOT MOS OFF 0...
  2. L

    Relay not switching

    Hello Team, I have designed a circuit in which the microcontroller's 8 pins for output control: 4 pins are assigned to relay outputs and the other 4 pins are used as general digital outputs. I have now fabricated the PCB and started testing. The issue I am facing is that the digital outputs...
  3. GRVEN21

    Help in the design of a filter FIR.

    In an community project, I was assigned to design an FIR filter that eliminate the 60 Hz hum and its harmonics present in a voice signal, without perceptibly degrading the quality or intelligibility of the conversation, while meeting the real-time constraints (latency and computational cost)...
  4. M

    Can we use this 4 bit adder commercially?

    I wonder if I can get any money for this circuit design.
  5. richard_w

    A Classic Problem with JK Edge Flip-Flop

    I encountered this question when leanring JK Flip-Flop. Can someone please explain how to do it? MOD NOTE: Moved to Homework Help.
  6. Gr10

    How to define states and transitions in an FSM applied to traffic lights?

    My college homework ask me to design a simplified traffic light controller that switches the lights at a street intersection (North-South street N-S and East-West street E-O). The controller's input is a button called **PASS**, which is activated by pedestrians when they wish to cross one of the...
  7. Gr10

    How to design a finite state machine (FSM) for a traffic light system using timers, vehicle detectors, and pedestrian priority?

    I am working on a traffic light control system for an intersection with a **main road (Vp)** and a **secondary road (Vs)**, using: - **Vehicle detectors**: - **Dp** (main road). - **Ds** (secondary road). - **Pedestrian buttons**: - **Pp** (to cross the main road). - **Ps**...
  8. Gr10

    Help designing a FSM sequence detector with two input sequence

    I need to design an FSM sequence detector that activates when it detects the sequences 01011 and 00101. The problem is that I don't know how, for example, when state s3 receives the value 0 and reaches 010, to make s3 transition to 001 if it receives a 1. This is the design I made: I need...
  9. ashokraj

    Looking for a possible chip which can do the following

    Hi, currently i am using onsemi RSL10 to communicate with digital accelerometer. Currently it is sampling at 6KHz. I would like to change the acclerometer to a higher G which samples at 25.6KHz. in order to that the current controller does not support because of the limitation of RAM...
  10. userkalyegon

    2-digit up-down counter (0000 to 1010) in logisim

    Hello allaboutcircuits! The instructions for my task are above. There are no explicit restrictions, but I want to use flipflops for this one. We were taught no prior knowledge except basic gates and elementary logisim operation. I'm learning as I go and so far, an 11-state (0000-1010) up...
  11. E

    Anyone know where I can buy a 5 bit ADC?

    Hi, Looking for a 5 bit ADC but at the moment I can only find 6 bit ones online. Anyone know where I might be able to get ahold of a 5 bit ADC? Thanks!
  12. MissFluffy

    *Circuit Issues* DIGITAL ALARM CLOCK

    Hi everyone! I'm currently working on a digital alarm clock project and have used a website for reference: (https://bestengineeringprojects.com/digital-clock-with-seconds-and-alarm-time-display/) However, I've made some modifications, such as removing the transformer and some diodes. I've added...
  13. maxdha

    Is there a smarter way?

    Hi, I'm working on a project that involves displaying the following words on three 7-segment -displays. 1. A S U 2. F O E 3. C S E 4. F U N Each word should transition to the next after a one-second interval. I made it by creating a truth table for each display and implemented it using logic...
  14. L

    Help! Is there a way to implement this?

    Hi Guys, noob here. - I have board A and board B. Both have MCUs. - I have a reset signal going from board A to board B. The reset signal is normally HIGH (3.3V) - I have a digital input signal (logic 3.3V) going from board B to board A. - current implementation is two wires going to board A...
  15. Owari

    How to make a reset button on a digital clock (HELP)

    Hi there, My group is currently working on a digital clock project. The clock must have seconds, minutes, hours, days and months and a reset button. Currently, we already have most of them except the reset button. I just want to ask if there is a way to design a reset button for the above...
  16. Foxief

    How do you design a counter that show the result for 5 second

    I have this problem given by my teacher, but cant figure out the part where i need to show the result for 5 second Design a 3-digit counter, the counter will count for 20 seconds and display the counting results for 5 seconds then reset automatically and start counting from zero This is how i...
  17. JuanBGT

    Need help with 74ls193

    Hi, I'm working on a project in which I need to create an 8-bit adder with two cascaded 74LS193s, so that when it reaches 255 it starts subtracting, creating some kind of triangular waveform by steps. It works well in the first part of the waveform but in the remaining part it has a sudden jump...
  18. Topad

    Output logic source and sink

    Hi all, Im working to design a circuit that can sink after a load is apply, but when there's no load also be able to output logic levels 5v/0v. The max that a load could be is 12V and not not more than 100ma, therefore I decided to use octocapulers to make some output logic. In my attach image...
  19. S

    Hardware Interlock Circuit with AND & NOT Gates

    Here is my Hardware Interlock Circuit for Gate Signals which prevents both PWM Signals to be at same state at any given time. Here I want to reduce this two AND Gate IC's into a Single AND Gate IC. Or Is there any other way to implement the Hardware Interlock for Gate Signals ? Is there any...
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