Hello!
I'm trying to analize this block, where a resistor and a capacitor share their terminals:



Obviously

\[ v_R = v_C = v \]

A specific condition may be found (in the Laplace domain) where the net current i = 0. This occurs when the current on the resistor is equal and with opposite sign with respect to the current on the capacitor. Maybe this is equivalent to stating that the capacitor is continuously charging and discharging to/from the resistor.

\[ i = i_R + i_C\\ i_R = -i_C \rightarrow i = 0 \]

This is verified for

\[ v_C = \frac{i_C}{sC}\\ i_C = sC v_C\\ i_C = -i_R\\ sCv_C = - \frac{v_C}{R}\\ s = - \frac{1}{RC} \]

which corresponds to the real frequency

\[ \omega = \left| - \frac{1}{RC} \right| \]

In this condition, the net current i through this block is 0, because i_C = -i_R, regardless of the rest of the circuit. This may represent a zero of this system, because if an external voltage or current is applied, the output current is 0.

In the Laplace domain it all seems ok, but I'm struggling to figure out how these currents may be equal and opposite in the time domain.

If for example (due to some external excitation)

\[ v_R (t) = V_0 \cos (\omega t + \phi) \rightarrow i_R(t) = \frac{V_0 \cos (\omega t + \phi)}{R} \]

we also have

\[ i_C (t) = C \frac{dv_C(t)}{dt} = C \frac{dv_R(t)}{dt} = -\omega V_0 C \sin (\omega t + \phi) \]

With

\[ \omega = \frac{1}{RC} \]

it is

\[ i_C (t) = C \frac{dv_C(t)}{dt} = C \frac{dv_R(t)}{dt} = - \frac{V_0}{R} \sin (\omega t + \phi) \]

This is not -i_R. They are simply two sinusoidal waves out of phase. They are not the opposite of each other. I can't figure out how, only at a specific frequency, it should be i_C = -i_R, and why.

 

The impedance of the resistor is not a function of frequency. The impedance of the capacitor is a function of frequency. For fixed values of resistance and capacitance each frequency represents a different problem. For the currents to be equal, a specific frequency is required.

 

The current through the resistor is always in phase with the applied voltage.
The current through the capacitor is always 90° ahead of the applied voltage.
The sum of the two is never zero (except at the two points in the cycle when the waveform crosses zero).

 

What is the basis for taking the absolute value of s?

s = jw

The current through the resistor is 90° out of phase with the current in the capacitor at any real frequency, never 180° out of phase.

 

The current through the resistor is always in phase with the applied voltage.
The current through the capacitor is always 90° ahead of the applied voltage.
The sum of the two is never zero (except at the two points in the cycle when the waveform crosses zero).

Ok, and I agree. But then how can the results in the Laplace domain be justified? With

\[ s = -\frac{1}{RC} \]

actually it is

\[ i_C = - i_R \]

so there is a phase difference of 180° between them.

 

What is the basis for taking the absolute value of s?

s = jw

The current through the resistor is 90° out of phase with the current in the capacitor at any real frequency, never 180° out of phase.

I can not find an example textbook using the absolute value from s. Let's suspend this question for now.

The expression

\[ i_C = -i_R \]

holds for

\[ s = - \frac{1}{RC} \]

This is a matter of fact. And it seems (but I'm not sure about this) that there's a contradiction between the fact that iR and iC are always 90° out of phase and this result. This result apparently implies, in fact, that for a specific frequency there is a 180° phase difference between iR and iC.

My doubt is: how to clarify this apparent contradiction? Which currents in the time domain can verify this Laplace result?

 

I can not find an example textbook using the absolute value from s. Let's suspend this question for now.

Why? Your entire result is dependent on setting the frequency equal to the absolute value of s. So when that is called into question, your response is to just ignore it and plunge blindly ahead down a path for which big red warning flags have been thrown?

Does that sound like a reasonable approach?

The expression

\[ i_C = -i_R \]

holds for

\[ s = - \frac{1}{RC} \]

This is a matter of fact. And it seems (but I'm not sure about this) that there's a contradiction between the fact that iR and iC are always 90° out of phase and this result. This result apparently implies, in fact, that for a specific frequency there is a 180° phase difference between iR and iC.

My doubt is: how to clarify this apparent contradiction? Which currents in the time domain can verify this Laplace result?

The frequency at which s = -1/(RC) is w = j/(RC) or, in other words, at an imaginary frequency.

If you can find a voltage source that can put out a sinusoidal signal at an imaginary frequency, then you can get the two currents to cancel.

 

After some research, I will try to give an answer.
It is possible to search for zeros in the s domain: but s is a complex variable, that can be written as

\[ s = \sigma + j \omega \]

It does exist a value of s such that

\[ i_C = -i_R \]

and it is

\[ s = - \frac{1}{RC} \]

However, when the frequency response of a circuit is evaluated, the Laplace-domain transfer function H(s) is only being evaluated along the imaginary axis, that is only for

\[ s = j \omega \]

This means that, even if H(s) = 0 for some values of s, it may be different when

\[ s = j \omega \]

The frequency response of a system is

\[ |H(s = j \omega)| \]

What is actually observed in this function is not a zero, but an indirect effect of the zero: H changes its slope (when omega is the abscissa).

H(s) may be written in several equivalent forms: in one of them, the general term for the k-th real zero in the numerator is a factor

\[ (1 + s \tau_k) \]

which is zero for

\[ s = z_k = - \frac{1}{\tau_k} \]

In the above example,

\[ \tau_k = RC \]

This value is real and - as it has been pointed out - there is no real corresponding frequency omega. However, when evaluating the magnitude of the above term for s = j omega,

\[ |(1 + s\tau_k)| = | 1 + j \omega \tau_k | = \sqrt{1 + \omega^2 \tau_k^2} \]

which is approximated by 1 for

\[ \omega \ll \frac{1}{\tau_k} \]

and which is

\[ \sqrt{1 + \omega^2 \tau_k^2} \simeq \omega \tau_k \]

for

\[ \omega \gg \frac{1}{\tau_k} \]

The point which separates these two behaviours is

\[ \omega = \left| - \frac{1}{\tau_k} \right| = \left| - \frac{1}{RC} \right| = \frac{1}{RC} \]

This is different from the zero in the s variable, but it is the point when it begins to act in the transfer function. So, this quantity has a meaning.

Why? Your entire result is dependent on setting the frequency equal to the absolute value of s.

Please, also consider this document, pages 5-6, where this same approach is followed.

 

As a recap: I was wrong, there is no real frequency which can realize

\[ i_C = -i_R \]

This can be obtained for a value of the s variable which does not correspond to a real sine with a real frequency. Thanks for pointing this out.

However, the absolute value of the zero in the variable s corresponds to a point in the real omega axis when the zero begins to have an effect on the frequency response

\[ |H(j \omega)| \]

of the system.

 

Hello!
I'm trying to analize this block, where a resistor and a capacitor share their terminals:

View attachment 283008

Obviously

\[ v_R = v_C = v \]

A specific condition may be found (in the Laplace domain) where the net current i = 0. This occurs when the current on the resistor is equal and with opposite sign with respect to the current on the capacitor. Maybe this is equivalent to stating that the capacitor is continuously charging and discharging to/from the resistor.

\[ i = i_R + i_C\\ i_R = -i_C \rightarrow i = 0 \]

This is verified for

\[ v_C = \frac{i_C}{sC}\\ i_C = sC v_C\\ i_C = -i_R\\ sCv_C = - \frac{v_C}{R}\\ s = - \frac{1}{RC} \]

which corresponds to the real frequency

\[ \omega = \left| - \frac{1}{RC} \right| \]

In this condition, the net current i through this block is 0, because i_C = -i_R, regardless of the rest of the circuit. This may represent a zero of this system, because if an external voltage or current is applied, the output current is 0.

In the Laplace domain it all seems ok, but I'm struggling to figure out how these currents may be equal and opposite in the time domain.

If for example (due to some external excitation)

\[ v_R (t) = V_0 \cos (\omega t + \phi) \rightarrow i_R(t) = \frac{V_0 \cos (\omega t + \phi)}{R} \]

we also have

\[ i_C (t) = C \frac{dv_C(t)}{dt} = C \frac{dv_R(t)}{dt} = -\omega V_0 C \sin (\omega t + \phi) \]

With

\[ \omega = \frac{1}{RC} \]

it is

\[ i_C (t) = C \frac{dv_C(t)}{dt} = C \frac{dv_R(t)}{dt} = - \frac{V_0}{R} \sin (\omega t + \phi) \]

This is not -i_R. They are simply two sinusoidal waves out of phase. They are not the opposite of each other. I can't figure out how, only at a specific frequency, it should be i_C = -i_R, and why.

Hello,

Are you talking about the time domain exclusively or also the frequency domain?

I think it would be better if you show an entire circuit. It does not make much sense to ask if a capacitor with some charge in it connected across a resistor sometimes balances out the current or whatever it is you are after. If the capacitor has no charge then there is no current, if the capacitor has charge then there is always current until it discharges completely. Or maybe a better problem statement would help here.

Also, is 'i' a constant current or can it vary or what? If it varies is it sinusoidal?
This is a good reason for showing an entire circuit along with any source that drives it. The behavior can vary a lot depending on what drives the circuit.
For example, if you apply a ramping voltage you may get a time when the capacitor current equals the resistor current. There can be even more interesting results if you apply an exponentially increasing or decreasing voltage (or current).

 

I think it would be better if you show an entire circuit. It does not make much sense to ask if a capacitor with some charge in it connected across a resistor sometimes balances out the current or whatever it is you are after. If the capacitor has no charge then there is no current, if the capacitor has charge then there is always current until it discharges completely.

Very not true.

Just look at a capacitor in an AC circuit at sinusoidal steady state. When the capacitor has zero charge is precisely when the current through it is a maximum, and when the capacitor has its maximum charge is precisely when the current through it is zero.

The current in a capacitor is proportional to the rate at which the voltage is changing and the actual voltage has nothing to do with it. If the rate of change is the same, then the current will be the same whether the voltage is positive, negative, or zero.

 

Very not true.

Just look at a capacitor in an AC circuit at sinusoidal steady state. When the capacitor has zero charge is precisely when the current through it is a maximum, and when the capacitor has its maximum charge is precisely when the current through it is zero.

The current in a capacitor is proportional to the rate at which the voltage is changing and the actual voltage has nothing to do with it. If the rate of change is the same, then the current will be the same whether the voltage is positive, negative, or zero.

Hello,

But see you are specifying a type of source now, which i was not assuming. Once you specify, it begins to make sense. That's one of the main reasons why i asked for a full schematic so we could see the source (or sources).

Did you honestly think i did not know that

 

Hello,

But see you are specifying a type of source now, which i was not assuming. Once you specify, it begins to make sense. That's one of the main reasons why i asked for a full schematic so we could see the source (or sources).

Did you honestly think i did not know that

It doesn't matter what the source is. You claimed two things, both of which are false claims.

Claim #1: If the capacitor has no charge then there is no current.
Claim #2: If the capacitor has charge then there is always current until it discharges completely.

I gave a counterexample that proves that both of these statements are false.

 

It doesn't matter what the source is. You claimed two things, both of which are false claims.

Claim #1: If the capacitor has no charge then there is no current.
Claim #2: If the capacitor has charge then there is always current until it discharges completely.

I gave a counterexample that proves that both of these statements are false.

I think you are just being too pedantic.
I can restate if you like.

But you did not answer my question either. It's a simple RC parallel circuit. Who would not know how it works with an AC source?

 

I think you are just being too pedantic.
I can restate if you like.

But you did not answer my question either. It's a simple RC parallel circuit. Who would not know how it works with an AC source?

Lot's of people, particularly people that are just learning this stuff. Are confident that the TS knows how it works with an AC source?

 

Lot's of people, particularly people that are just learning this stuff. Are confident that the TS knows how it works with an AC source?

Hi,

Not sure what you mean here, but hey, Happy New Year.

In another thread i was joking about time travel because when it is 2023 here for 3 hours it is still 2022 in Los Angeles. But now that i think about it, when we say "Happy New Year" it seems we think we are psychic. How can we possibly know the entire year will be happy

I texted Happy New Year to a friend in Los Angeles but then had to correct it because it wasnt the new year yet there. That struck me as very strange.
I think for time measurements we rely on the sun too much Who cares if it is dark in some places at 12 noon or not. In Alaska they dont seem to have a problem with it.

 

Hello,

But see you are specifying a type of source now, which i was not assuming. Once you specify, it begins to make sense. That's one of the main reasons why i asked for a full schematic so we could see the source (or sources).

Did you honestly think i did not know that

The only time I can think of that current in the circuit would be proportional to the charge on the capacitor is when nothing is connected to the parallel RC and some previous event of either a current source or voltage source charging occurred and has now been disconnected from the circuit? Is that what you are trying to say or something else?

 

Hi,

Not sure what you mean here, but hey, Happy New Year.

In another thread i was joking about time travel because when it is 2023 here for 3 hours it is still 2022 in Los Angeles. But now that i think about it, when we say "Happy New Year" it seems we think we are psychic. How can we possibly know the entire year will be happy

I texted Happy New Year to a friend in Los Angeles but then had to correct it because it wasnt the new year yet there. That struck me as very strange.
I think for time measurements we rely on the sun too much Who cares if it is dark in some places at 12 noon or not. In Alaska they dont seem to have a problem with it.

To make it even more bizarre, wait until we have colonies on the Moon, Mars, etc. I mean what on earth does happy new year mean to those people?

 

The only time I can think of that current in the circuit would be proportional to the charge on the capacitor is when nothing is connected to the parallel RC and some previous event of either a current source or voltage source charging occurred and has now been disconnected from the circuit? Is that what you are trying to say or something else?

Hello there,

My main intent was to shed some doubt on the problem statement so we could get more information and then render a really good solution. I didnt think it was written well enough to be certain what was really wanted. I then analyzed one particular condition to show that one condition and how it cant be the only one (not necessarily a real solution) unless we know more about the circuit. Maybe i did not make it clear enough.

 

To make it even more bizarre, wait until we have colonies on the Moon, Mars, etc. I mean what on earth does happy new year mean to those people?

Is that before or after they all die because they needed something right away and it would take months to get it to them

Yes if so, that will be strange. I guess Mars would have a different year entirely, so we would end up having to modify the new year place. Happy Earth New Year, Happy Mars New Year, happen New Moon Revolution (ha ha).