Thanks Sarah:

I ordered some 74HC574s. Thanks again!

Since I had the second dual counter on board already, I decided to build the rest of the 4 digit counter, and it works fine! Strange thing though, if you go past a 9999 count, and do 10056 for example, the zero digits bank out. I wasn't expecting that! Of course, it wouldn't happen if the counter was longer.

 

Since I had the second dual counter on board already, I decided to build the rest of the 4 digit counter, and it works fine! Strange thing though, if you go past a 9999 count, and do 10056 for example, the zero digits bank out. I wasn't expecting that! Of course, it wouldn't happen if the counter was longer.

Of course. Your leading digit is 0.

 

Of course. Your leading digit is 0.

Yes, I realised that later while making dinner. Now I'll have to add an overflow indicator and maybe a lockout function. All good fun!

 

Please keep me posted Sarah and I will do the same!

I have the circuit worked out, finally. After spending many pointless hours trying to do it by using the spare gates and inverters lying around on the breadboard, and only getting halfway there, I decided to do it the proper way with a dual FF package, and it just took about 30 minutes! Such is life, but it's the best way to learn!

I haven't got time now, but will draw it out tomorrow and send it.

 

Well here it is. Not knowing which other chips you have in your arsenal, I tested it out with several. I knew that my 4518 counters, because they don't have the Carry Out pin that the 4510 has, would need a negative edge triggered FF, so I used a 74HC112 initially. Once I had it working, I tried a 4027, but this need the inverter as in the diagram, as did the 4013 in the diagram, and this worked as well. The Over Range LED blinks quite nicely! My one runs at just 70uA, so doesn't need a current boost!
You may find that the Carry Out pin will do the job and you won't need the inverter,but I couldn't test it, not having either a 4510 or a 4516.
Although I don't show them, all the Latch and Reset lines continue to the other chips, of course. Just note the NOTE (no pun intended!) in the schematic.
When using the negative edge triggered FF, the latch and Reset pin sections are separate, with the FF ones going to different 4098 pins than the main counter and latch sections.

 

Thanks Sarah. This is excellent! It might be a while before I get this built but I will let you know
how it turns out!

After studying this cool circuit, I have some questions before I proceed:
1) I am currently using CD4510s for counters. If I switch to CD4518s it looks like I can eliminate 3 counters
in a 7 digit frequency counter. But will my RESET signal that I am currently using, work with the
CD4518s and the CD4013? I have attached a scope image of my control signals, where Ch1 is the timebase,
Ch 2 is the STORE signal and Ch 3 is the RESET signal.
2) Also, will my STORE signal that I am using for the CD4511, work with the CD4518s and the CD4013?
3) Silly question, but I assume that CD4013 Section B pins 4 and 6 go to ground.

I owe you big time!

You could switch to CD4518's, but if you already have the 4510's........ The only thing to check is whether the /CO pin of the Most Significant Digit will trigger the FF at the correct time, without needing an extra inverter added!
In my circuit, both the Reset and the Store pulses are Positive going, due to where they come from in the 4098 monostable. The latches in the 4511's are unused and wired to 0V. Yes, pins 4 & 6, and the downward pointing arrows all go to 0 Volts. I've only place power pins where related to control pin functions.

When you say a 7 digit counter, do you mean 6 digits plus the overload indicator, or 7 plus the overload. I ask because if you are trying to make a 10MHz counter you will be hard pressed to make CD CMOS chips go that fast unless you raise the supply voltage, at least for the Least Significant counter and your Reset and Store pulse generation circuits. Then you won't be able to use 74HC574 latches in that part!
If that's your intention you'd be better off redesigning at least the first stage(or 2) to use a 74HC version of the part. Unfortunately although they were made, I can't find a supplier now. So you're looking at using an HC version of a TTL part, which means using the opposite polarity Reset pulse for those chips alone.

 

Hi
I was hoping to be able to measure frequencies above 1 MHZ. In an earlier post, someone had mentioned 7 digits and a
5 MHZ limit but if that isn't feasible with these chips, I will just leave it at 6 digits plus the overload indicator.

My SN74HC574ANs arrived yesterday as well as some CD40174BEs (just in case).

A problem with either the CD4510 or the CD4518 is that they are limited to around the 2MHz mark at 5V, and not much more than 5.5 or 6MHz at 10V, so really do need an HC counter stage for the least significant digit if you wish to stick with 5V and measure faster than that. Either 74HC160 or 74HC190 counters could be used to push it into the 20MHz range, with minor modifications.

Edit: I meant to add this adaptation of your current circuit with my part added on (at least I think it is!) Look it over and tell me what you think.

 

If you want to forego the advantages of CMOS and you want to push the max frequency, you can use 74F160 counters (assuming you can find stock) which will count to 120 MHz. Then you can use 74LS47 decoder/drivers that do leading zero blanking.

If you go with asynchronous counting, you only need one 74F160 stage. The remaining digits can be 74LS160.

 

Hi

Right on. This is what I drew up yesterday. I did show the inverter in my circuit but I am going to
try it without first of all. I think for now, at least, I will limit the counter at 1 MHZ.

I see 3 problems here:
1) Your counters UP/Down should be held High.
2) Your LED should have the resistor in series with it, and may need a driver if it takes too much current (a spare 4049 gate will do.)
3) The /BI input should now connect to the output of the 4071 pin 3, rather than 4072 pin 1.

I'm still not 100% sure if the inverter is needed between the /CO output of the 4510 and the Clock input of the FF. The other option with it is to connect the inverter to the Q4 output. That definitely works!

 

Thanks I will correct these items! I will use Q4 to eliminate the inverter package.

You will still need the inverter if you use the Q4 output!

 

I said it once before and will say it again. You don't do digital design by trial and error. Sometimes things work for the wrong reasons. You need to read the device datasheet and follow the correct boolean logic. That puts the proper meaning of the word "logic" into the design.

I once had to troubleshoot a problem with a commercial machine (punched card reader). It worked in one situation and not in another. When I examined the logic, I could see why the designer mistakenly inserted a NOT gate in the design. Removing the NOT gate solved the problem.

 

I said it once before and will say it again. You don't do digital design by trial and error. Sometimes things work for the wrong reasons. You need to read the device datasheet and follow the correct boolean logic. That puts the proper meaning of the word "logic" into the design.

I once had to troubleshoot a problem with in commericial machine (punched card reader). It worked in one situation and not in another. When I examined the logic, I could see why the designer mistakenly inserted a NOT gate in the design. Removing the NOT gate solved the problem.

The error was on my schematic, not the breadboard. The circuit works perfectly so far.

 

You will still need the inverter if you use the Q4 output!

Ok thanks!

 

Now that you have it working, did you use the /CO output to the FF WITHOUT the inverter, or with it? Or did you go from Q4 instead? From the timing diagram the /CO pin should go from Low to High when the counter rolls over from 9 to 0, so the FF shoudn't need the inverter!

 

How did you get on with the circuit? Did you finish it, and if so which version did you use?

 

How did you get on with the circuit? Did you finish it, and if so which version did you use?

Hello

I have been swamped lately. I have started working on the project again and all
of the ICs are laid out on the protoboards. Wiring has begun. There will
be 7 digits in all. I hope to do a lot today. Will keep you posted.

 

I'm surprised that the overload circuit gave problems for you, considering that it worked fine for me. I just wish I had identical counters to yours so as to rule out any differences there.
I'll see if I have any of the CD4516 Binary counter version of your 4510. If so, I'll try substituting a couple and checking the overload circuit again.
Let me know how you get on and what you try if you do.

 

I'm surprised that the overload circuit gave problems for you, considering that it worked fine for me. I just wish I had identical counters to yours so as to rule out any differences there.
I'll see if I have any of the CD4516 Binary counter version of your 4510. If so, I'll try substituting a couple and checking the overload circuit again.
Let me know how you get on and what you try if you do.

Hi:

I was surpised as well but it may have something to do with the counters as you suggested. I get my chips from
DigiKey as their prices are decent and they have overnight shipping if you are interested. I experimented with
the following circuit that turns on a red LED if I input a frequency of 1.2 Mhz. This approach is sort of like the
ripple blanking thing where you would have to put a magnitude comparator on each digit in order to do it right.
My protoboards are so busy now as it is.

I have another idea for a frequency counter using the CD4033s. They have ripple blanking but no latches. The
7-segment outputs could be latched using the SN74HC574s (one per digit). That would eliminate the need for
the CD4071s and CD4072s and separate counter chips. Just a thought.

 

A problem with either the CD4510 or the CD4518 is that they are limited to around the 2MHz mark at 5V, and not much more than 5.5 or 6MHz at 10V, so really do need an HC counter stage for the least significant digit if you wish to stick with 5V and measure faster than that. Either 74HC160 or 74HC190 counters could be used to push it into the 20MHz range, with minor modifications.

Edit: I meant to add this adaptation of your current circuit with my part added on (at least I think it is!) Look it over and tell me what you think.

View attachment 337803

Hi

I want to give the frequency counter a greater frequency range by increasing the supply voltage to 10 or 15 volts.
I built up a new board with just 2 digits and used the CD40174BE. The units digit works (using the internal latch
here) but the tens digit does not light up at all. After studying the data sheet, I thought that should work? Any
ideas?

 

Hi

I want to give the frequency counter a greater frequency range by increasing the supply voltage to 10 or 15 volts.
I built up a new board with just 2 digits and used the CD40174BE. The units digit works (using the internal latch
here) but the tens digit does not light up at all. After studying the data sheet, I thought that should work? Any
ideas?

Without seeing your circuit I can't say, but those chips won't be any faster at 10V than the CD4510's! Your best bet would be to replace the first one or two least significant CD4510's with CD74HC4510's, then you would be able to count at up to 30MHz minimum at 5V!

I built up a 4 stage version of your CD4510 counter after realising that the CD4029 counter is almost identical, except it doesn't have a Reset input, but has a Binary/Decade pin there instead. So by using the Preset Enable input as a Reset input, and setting it to Decade counting, it works exactly like the 4510!
The Overload circuit worked just fine, but I added the extra OR gate in line with the final Carry Out, and OR'red it with the Input Clock signal, as per the datasheet suggestion about spurious glitch pulses, noted in figure 13 in the CD4029 sheet, and the CD4510 one!
I did notice that you used pin 7 (/Q) as the Latch signal to the 574's. This means that they don't latch the count value until about 1us after the true timeout of the timebase. This won't matter for slow inputs, but will add counts if you make measurements above 1MHz. It also means that it is latching at the same time as the Reset pulse is happening! I'd move it back to the Q output.