OK, and the circuit looks reasonable.
So when you build it please let us know how well it works, and how close it comes to doing what you wanted it to do.

 

OK, and the circuit looks reasonable.
So when you build it please let us know how well it works, and how close it comes to doing what you wanted it to do.

I'm actually trying to fix the "ErrType(3) Pin conencted to other pins but no pin to drive it" warning from KiCAD.
I fixed most of them but I got a new one

 

OK, I see an issue that while the connection to the regulator is correctly defined, the power input connection of the processor is also called a power output. That triggers the error flag. So adjusting the definition of that processor power pin is required. Not a circuit error, but a definition problem.

 

OK, I see an issue that while the connection to the regulator is correctly defined, the power input connection of the processor is also called a power output. That triggers the error flag. So adjusting the definition of that processor power pin is required. Not a circuit error, but a definition problem.

You mean the VDD pins of the microcontroller?

 

The U1 has a pin designated PWR output, so it does not require a PWR_FLAG.

 

The U1 has a pin designated PWR output, so it does not require a PWR_FLAG.

But if I remove the power flag from +3V3, I'll get errors at other points in the circuit! I'm not sure how to fix this.

 

Post a clear copy of the Schematic with no overlays.

 

Post a clear copy of the Schematic with no overlays.

 

For one, the two VDD pins on U2 should have a VDD power flag not a label.
Plus the 3V3 are labels
You do not need the PWR_FLAG on the input to the U1, Also the output of U1 does not need the power flag due to the pin VO is a power output pin.
Pin 16 & 32 of the U2 should simply have a power GND symbol.
Also two power labels on output of U1 3.3V and VDD not needed.only need one

 

For one, the two VDD pins on U2 should have a VDD power flag not a label.
Plus the 3V3 are labels
You do not need the PWR_FLAG on the input to the U1, Also the output of U1 does not need the power flag due to the pin VO is a power output pin.
Pin 16 & 32 of the U2 should simply have a power GND symbol.
Also two power labels on output of U1 3.3V and VDD not needed.only need one

U1 is still with

 

You can remove the 3.3v PWR_FLAG because it is defined as a supply by virtue of the VD pin of U1 defined as a power output pin.
Is R1 needed? why not feed the pin 1 of U1 with 12v direct?

 

BTW if you do require the R1 10ohm you could add a power pin say +12L to the U1 input and also assign a power flag to it with the rest.

 

BTW if you do require the R1 10ohm you could add a power pin say +12L to the U1 input and also assign a power flag to it with the rest.

I added the PWR_FLAG +12L to U1 input pin but the warning is still there


About R1, I don't remember it's main rule. Maybe some kind of protection in case of any high currents coming from the 12V supply? I'm not sure. If it's not needed for anything, I'll remove it!

 

I don't see why R1 would be needed?
But did you set a PWR_FLAG for the +12L label. I tested it and it worked OK.
All the power supply labels are just that, a label, the Power Flags themselves are actually a power output pin, if you look at it with the editor etc.
As the power labels are usually added to the supply pins of devices, it is expected that they all be powered somehow, this is where the PWR_FLAG's come in, designating the power labels as a supply source.

 

I don't see why R1 would be needed?
But did you set a PWR_FLAG for the +12L label. I tested it and it worked OK.
All the power supply labels are just that, a label, the Power Flags themselves are actually a power output pin, if you look at it with the editor etc.
As the power labels are usually added to the supply pins of devices, it is expected that they all be powered somehow, this is where the PWR_FLAG's come in, designating the power labels as a supply source.

Oh ok.

Well, removing that R solves the problem and I don't need the +12L power flag. That being said, I removed it and re-annotated all components.



I would like to know now which capacitors (and other components) needs to be as close as possible to which leads. I know that not all of them need to be as close as possible, so which ones would need to?

 

Generally electrolytics are not crytical and can be near the power input sources, for decoupling capacitors on IC power etc, they should be as close to the IC power pins as possible. U1 & U2.
C1 close to the P.B. SW.
There seems to be a rather high number of decoupling capacitors?
The conflict you were getting with the U1 input pin maybe due to the Junction node that seems to be added on the input pin, as the identical circuit worked for me with no error.?

 

Generally electrolytics are not crytical and can be near the power input sources, for decoupling capacitors on IC power etc, they should be as close to the IC power pins as possible. U1 & U2.

Sorry I got confused here. You say electrolytic are not critical but then you say they should be close to the IC power pins.
So, should C8 an C9 be as close as possible to U2 pins or not?

C1 close to the P.B. SW.

P.B. is push button?

There seems to be a rather high number of decoupling capacitors?

Ok, so I'll list here each capacitor role.

C2 is for normal Positive to Negative rail filtering/smoothing/whatever.
C3 an C4 are for U1 (AMS1117) input and output, respectively.
C5, C6 an C7 are according with U2 datasheet.
One 100nF cap per VDD pin and one 10μF for all VDD pins as shown below. So, 2x 100nF caps (C5 an C6) and the other one of 10μF (C7).


Then, C8 an C9 were a suggestion of a friend of mine for VDDA filtering, along with C10 an C11.

The conflict you were getting with the U1 input pin maybe due to the Junction node that seems to be added on the input pin, as the identical circuit worked for me with no error.?

I think it's fixed. I know that KiCAD can't read over resistors or caps, so, without that 10 ohm resistor, that problem is gone!

 

I should have distinguished between the electrolytic's and the IC de-coupling capacitors, which generally are ceramic or non-electrolytic types. nF range.
C3 & C4 close to the U1.
I assume C6 & C7 to de-couple the VDD & VDDA. situated close to the relative IC pins.
C8 C9 & L1 close proximity to each other.

Removing the 10Ω is one way to solve it.

 

I should have distinguished between the electrolytic's and the IC de-coupling capacitors, which generally are ceramic or non-electrolytic types. nF range.

I'm not sure I understand. Distinguish between electrolytics and the IC e-coupling capacitors? I used different symols. C8 an C9 are the only electrolytics. At least that was my intention.
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I assume C6 & C7 to de-couple the VDD & VDDA. situated close to the relative IC pins.

As I said in my post above, those are for VDD pins. Not VDDA.

One 100nF cap per VDD pin and one 10μF for all VDD pins as shown below. So, 2x 100nF caps (C5 an C6) and the other one of 10μF (C7).

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C8 C9 & L1 close proximity to each other.

I assume they should also be close to VDD and VDDA pins. Or not needed?




Edited;

Another thing I need to know, is which capacitors needs to be tantalum and which need to be ceramic. Can anyone tell me?
Or better, tell me when I should chose one or the other. Same applies to know when capacitors needs to be close to the pins and when they can be at longer distances, so that I don't need to be asking each time I want to build some project.

 

Electrolytic capacitors, and all other polarized capacitors, always need the + (positive) terminal identified on the drawing. That is because not all the folks involved can understand which side is positive by examining the circuit.