Can pull-up and pull-down resistors be in the same circuit? (FPGA)

Thread Starter

nrhznd

Joined Mar 31, 2022
10
Hello I need help with FPGA circuit design.
I'm using Xilinx Artix-7 XC7A35T.
Based on the datasheet/userguide, INIT_B pin must be connected to an external pull-up resistor (4.7kΩ) to ensure clean low to high transition.
However, based on the circuit below, we're also connecting the circuit to an IC (Texas Instruments' SN74LVC2G14)
which required pull-down resistor. For the time being, the pull up resistor is empty.

Question is, if I am to add pull up resistor to the empty slot, will it cause problem?
I am very new to hardware design, and I am also not the one designing the circuit.
But the work is passed to me, now I am at lost.
Please help me.
1648780220425.png
 

Papabravo

Joined Feb 24, 2006
18,408
The LVC2G14 has a push-pull driver that will not assume any intermediate values. I don't see the need for either a pull-up OR a pull-down. What exactly is your reason for thinking you need either one?
 

Thread Starter

nrhznd

Joined Mar 31, 2022
10
The LVC2G14 has a push-pull driver that will not assume any intermediate values. I don't see the need for either a pull-up OR a pull-down. What exactly is your reason for thinking you need either one?
From the datasheet the typical application is to connect it with pull-down.
1648790166997.png
but from xilinx artix-7 userguide,
1648790257227.png
with the circuit I posted above, I got waveform below.
I need the INIT_B signal to smoothly go from low to high
1648790364689.png
 

Papabravo

Joined Feb 24, 2006
18,408
You are showing a picture of an oscillator, and I don't see a pull-up in the schematic. I think you are conflating two different things. LVC2G14 will have nice snappy edges without the pullup. It is a modern CMOS part that does NOT suffer from the poor low to high drive of a non-CMOS part. You need to think about what is going on instead of blindly following a recommendation that does not apply to your situation.

If you want to do what you are going to do, then do it, but don't ask me to bless it with holy water.
 

Thread Starter

nrhznd

Joined Mar 31, 2022
10
You are showing a picture of an oscillator, and I don't see a pull-up in the schematic. I think you are conflating two different things. LVC2G14 will have nice snappy edges without the pullup. It is a modern CMOS part that does NOT suffer from the poor low to high drive of a non-CMOS part. You need to think about what is going on instead of blindly following a recommendation that does not apply to your situation.

If you want to do what you are going to do, then do it, but don't ask me to bless it with holy water.
The main focus is not LVC2G14,
as you can see I showed the waveform for FPGA INIT_B pin,
the pin needs pull up for clean transition from low to high, from the waveform I got, it's not clean.
If I mount pull-up, will it affect the circuit is the question.
I am sorry for the confusion, but I did state the question.
 

Papabravo

Joined Feb 24, 2006
18,408
The main focus is not LVC2G14,
as you can see I showed the waveform for FPGA INIT_B pin,
the pin needs pull up for clean transition from low to high, from the waveform I got, it's not clean.
If I mount pull-up, will it affect the circuit is the question.
I am sorry for the confusion, but I did state the question.
Excuse me sir. In post #1 you show an LVC2G14 driving INT_B with a pull-up and a pull-down. What you are saying about the signal at INT_B is not consistent with the schematic fragments you have presented. You are not on solid ground here and your understanding of digital electronics does not appear to be very strong. You might want to take a step back and show us the actual problem that you have and why you thing a pullup resistor is helpful. As far as I am concerned you have not made your case.

I can't tell anything about the red trace on the black background. How about a drawing which clearly shows the voltage levels and the timing of the two steps. That may or may not be significant.
 

Thread Starter

nrhznd

Joined Mar 31, 2022
10
Excuse me sir. In post #1 you show an LVC2G14 driving INT_B with a pull-up and a pull-down. What you are saying about the signal at INT_B is not consistent with the schematic fragments you have presented. You are not on solid ground here and your understanding of digital electronics does not appear to be very strong. You might want to take a step back and show us the actual problem that you have and why you thing a pullup resistor is helpful. As far as I am concerned you have not made your case.

I can't tell anything about the red trace on the black background. How about a drawing which clearly shows the voltage levels and the timing of the two steps. That may or may not be significant.
With all due respect, I don't know why you're irritated but I am sorry for the lack of knowledge.
I did say that I am new to hardware design, I know almost nothing about circuit designing.
Of course I can't show the whole schematic diagram since there are many circuit, it doesn't stop at the IC.

And it's not INT_B it's INIT_B I am not sure if you are talking about the same thing.
"why pull-up is helpful"
As I mentioned above, the datasheet for Artix-7 recommend pull-up resistor to be mounted into the circuit.
The waveform is to show that it's NOT a low to high transition, it was a low to middle to high transition.
My main problem is I need to find the SOLUTION on how to make the waveform go from LOW to HIGH, and NOT LOW to MIDDLE to HIGH.

I am not sure how many times I should repeat the question.
But if it's not clear, could you please list out what you need to know?
So that I can answer you more clearly.
 

MrChips

Joined Oct 2, 2009
26,088
I don't know what you are driving.

SN74LVC2G14 can drive and sink 24mA @ 3.3V with 6ns risetimes.
You should not need pull-up or pull-down resistors.
 

Papabravo

Joined Feb 24, 2006
18,408
With all due respect, I don't know why you're irritated but I am sorry for the lack of knowledge.
I did say that I am new to hardware design, I know almost nothing about circuit designing.
...
My level of irritation or lack thereof is irrelevant. You are the one that needs help. For someone who knows "almost nothing" you seem to be convinced that throwing unrelated screenshots of things out of context is a good way to communicate. I can tell you that you're not making your point in a way that is understandable. I am trying to impress this point on you and I want you to succeed in your task. You cannot do this without understanding what is going on. Furthermore, we can't help you if you cannot show us what the problem is.

Let me repeat myself:
I can't tell anything about the red trace on the black background. How about a drawing which clearly shows the voltage levels and the timing of the two steps. That may or may not be significant.
 

JWHassler

Joined Sep 25, 2013
293
It *seems* as if you are resetting/initializing the FPGA , for which you need an open-drain device. The pull-up resistor only makes sense this way.
Also: why the crystal-oscillator schematic?
 

BobTPH

Joined Jun 5, 2013
4,897
A pull-up and pull-down on the same input likely puts it somewhere between low and high, which is always a no-no on digital inputs.

Bob
 

drjohsmith

Joined Dec 13, 2021
394
With all due respect, I don't know why you're irritated but I am sorry for the lack of knowledge.
I did say that I am new to hardware design, I know almost nothing about circuit designing.
Of course I can't show the whole schematic diagram since there are many circuit, it doesn't stop at the IC.

And it's not INT_B it's INIT_B I am not sure if you are talking about the same thing.
"why pull-up is helpful"
As I mentioned above, the datasheet for Artix-7 recommend pull-up resistor to be mounted into the circuit.
The waveform is to show that it's NOT a low to high transition, it was a low to middle to high transition.
My main problem is I need to find the SOLUTION on how to make the waveform go from LOW to HIGH, and NOT LOW to MIDDLE to HIGH.

I am not sure how many times I should repeat the question.
But if it's not clear, could you please list out what you need to know?
So that I can answer you more clearly.
Did you also place this on the Xilinx forum ?
 

Thread Starter

nrhznd

Joined Mar 31, 2022
10
A pull-up and pull-down on the same input likely puts it somewhere between low and high, which is always a no-no on digital inputs.

Bob
oohh this is the asnwer i've been looking for.
Thank you for answering!
So it's not appropriate to add both on the same circuit. Got it.
 

Thread Starter

nrhznd

Joined Mar 31, 2022
10
My level of irritation or lack thereof is irrelevant. You are the one that needs help. For someone who knows "almost nothing" you seem to be convinced that throwing unrelated screenshots of things out of context is a good way to communicate. I can tell you that you're not making your point in a way that is understandable. I am trying to impress this point on you and I want you to succeed in your task. You cannot do this without understanding what is going on. Furthermore, we can't help you if you cannot show us what the problem is.

Let me repeat myself:
I can't tell anything about the red trace on the black background. How about a drawing which clearly shows the voltage levels and the timing of the two steps. That may or may not be significant.
Okay sir.
I am sorry. Let me tell the storyline.
I was asked to test the signal for FPGA for Xilinx Artix-7, I tested out signals for VCCO, Program_B, INIT_B, and FPGA_DONE
since it's required to confirm that the signal is high in accordance to the specification (as below)
for additional information; I am not the one who design the circuit, it was handed to me so suddenly, and I am very new to hardware design and barely have the knowledge.
1649033981352.png
however, when I tested it out, the INIT_B signal didn't have a clean HIGH signal (as below, the red line)
1649034435380.png
So I read the datasheet and userguide for Artix-7 and found out that the circuit for INIT_B needs pull-up resistor.
1649034679885.png
When I see the schematic, the pull-up resistor to VCCO is empty, and the circuit is connected to pull-down resistor. (below is the full circuit : im not sure, i know i cant reveal everything since it would be pnc)
1649035340189.png
So I wonder if I just mount the pull-up resistor on the empty spot (since it's recommended by the datasheet),
would it be a problem since there is pull down resistor on the same circuit?
It's such a hassle to solder a resistor to that circuit, so I want to make sure that it's okay to do that.
And also, to not just ruin the whole system by soldering the resistor.

Is there any information that is missing out? Please let me know.
Thank you.
 
Last edited:

Thread Starter

nrhznd

Joined Mar 31, 2022
10
I already gave you my answer.
SN74LVC2G14 has active drive for both HIGH and LOW levels. Remove both pull-up and pull-down resistors.
I missed your reply.
I am sorry and thank you for pointing it out!
This is the only thing I need to know.
 

Papabravo

Joined Feb 24, 2006
18,408
I already gave you my answer.
SN74LVC2G14 has active drive for both HIGH and LOW levels. Remove both pull-up and pull-down resistors.
I also said this in post #3. I cannot say why the signal is hanging at 2.7V for 13 milliseconds. If I had to guess, it looks like you have TWO driving sources on that line. We had a somewhat vulgar expression for that when it was two TTL gates, which had the property of weak drive in the HIGH state and strong drive in the LOW state. This should not be happening unless the Xilinx part is trying to drive the INIT_B line simultaneously. There should NEVER be a reason to have both a pullup and a pull-down on the same line.

Since I'm not there and don't have access to the documents you're going to have to dig around a bit. If the docs convince you need one of them, I would go with the pullup.
 
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