fpga layout

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  1. N

    Can pull-up and pull-down resistors be in the same circuit? (FPGA)

    Hello I need help with FPGA circuit design. I'm using Xilinx Artix-7 XC7A35T. Based on the datasheet/userguide, INIT_B pin must be connected to an external pull-up resistor (4.7kΩ) to ensure clean low to high transition. However, based on the circuit below, we're also connecting the circuit to...
  2. learnfromfailures

    Xilinx FPGA decoupling cap layout (traces and vias)

    I have the decoupling capacitors located close to Spartan 7 (<2000 mil). I'm trying to route these and connect it to the BGA pin. According to xilinx UG393, I shouldn't use same vias. PCB layout engineers often try to squeeze more parts into a small area by sharing vias among multiple...
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