An LED Chaser based on a 555 and 4017.

Discussion in 'Digital Circuit Design' started by DanielLitwin, Mar 25, 2017.

  1. DanielLitwin

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    Mar 23, 2017
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    Yeah, thankfully, PCB design is where my skills lay; it's just the digital logic part that confuses me.
     
  2. DanielLitwin

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    Mar 23, 2017
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    Bernard, for Plaque 8, I would guess that values of the caps are in micro-farads?
     
  3. Bernard

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    Yes.
     
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  4. Bernard

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    If using SRs for outer ring & circulating a single bit then here is one way to do it. Shown & tested is a count of 15. If the last stage is needed then clear could be taken from trailing edge of last stage. If the marque effect is desired, then an OR gate can be added at U12-1, reset, with the clock counted down, say by 4 as second input
    to OR. As there is a spare flip-flop U12B , clock can be divided by 2 making every other LED lit?
    All unused inputs of ICs are disabled to prevent circuit noise.
    Dan\'s Plaque #10 00000.jpg
     
    Last edited by a moderator: Apr 27, 2017 at 1:41 AM
  5. DanielLitwin

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    Mar 23, 2017
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    it's been a while sense I've done JK flip flops but I remember them being pretty easy,

    Thanks. This is definitely helpful info. Back to plaque #8... I'm assuming I can just use a standard 555 to generate my clock signals?
     
  6. Bernard

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    555 should be fine.
     
  7. DanielLitwin

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    Ok, I just want to make sure about on other thing as well. In your drawing number 8, the pin-out on the ICs (mainly U4, U5 and U6) looked upside down; or upside down in respect to how which order we want the LEDs to chase. I'll attach an image to show what I mean.
     
  8. Bernard

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    On D's P #8, ICs are not foot prints, just boxes with numbers. It is up to the constructor to redraw if necessary.
    Look at other drawings like pg. 4, post #64, ICs are not drawn as foot prints, & often times do not show power connections, just to keep it simple. Which LED comes on first ? U1-1,2 are prime as they do not come from another IC, so U1-18 is the first stage & will be the first to come on, so direction is from bottom of page to top or for LEDs L to R.
     
    Last edited: Apr 24, 2017 at 11:38 PM
  9. DanielLitwin

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    Mar 23, 2017
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    ok, I think I'm starting to understand. You had me until I took a second look at the BJT array. On the ULN, the bottom left of the chip starts at 0 and moves counter clock wise (up, to pin 18, then down) which confuses me as it differs from the datasheet.

    Should I be assuming that as I cascade 74HC164s and ULN2803s (let's call them pairs for now as they are tied together) that if Pair 1 lights up (A_square and A_bar), then (B_bar and (B,C,D,E)square))... and so on, that Pair 2 (the next pair of Register+BJT array) that it will pick up where it left off? I assume that's what Bernard meant in his drawing, but that was when I was thinking they matched the pinout of the actual ICs.
     
    Last edited: Apr 24, 2017 at 5:57 PM
  10. Bernard

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    If laying out a PCB then datasheet pinout is used. That is what Bernard ment in his drawing.
     
  11. Bernard

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    I going to post this earlier but was too excited about making a 201 in bowling today, not exactly true, just ran out of time, but 201 is true.
    A slight update on post # 104, D's P # 10. The OR gate mentioned is really an AND gate used as an OR, or I believe it is called a neg. AND.
    The CLR buss is active lo, as is CLR input of SR so the 74HC08 AND fits in just right. If both inputs are hi, out put is hi = no change in SR; if one or both inputs are lo, output is lo = SR reset. The no 2 input can be a submultiple of the clock, active lo.
    Dan\'s Plaque #11 00000.jpg
    LEDs might look something like this. 1000100010001
     
    Last edited by a moderator: Apr 27, 2017 at 1:41 AM
  12. DanielLitwin

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    Mar 23, 2017
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    Congrats on the 201!!! I don't think I've ever broken 165.
    So it's almost like we're using flip flops to control the LEDs? Or at least that's my understanding of JK flip flops, but it seems awfully small to control 38 LEDs
     
  13. Bernard

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    If you are considering a marquee style ring, then instead of SRs, I would look at one each of 555, 4017, & a ULN2803A.
    The 54 ? LEDs would be 4 groups of 13 & 14 in parallel, just like D's P #8 but with first 4 of U4s outputs driving
    13 or 14 LEDs in parallel. Easy layout ?
     
  14. Bernard

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    Post # 113 continued. A partial layout of ring in marquee style. Would be easy to change LED spacing as if
    a comet tail were desired.
    Dan\'s Plaque #12 00000.jpg
     
    Last edited by a moderator: Apr 27, 2017 at 1:40 AM
  15. DanielLitwin

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    Mar 23, 2017
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    Whoa that's awesome!

    I'm still working on the square wave and bar; then the outer ring takes priority.
     
  16. DanielLitwin

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    Mar 23, 2017
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    I wish I had Proteus so I could simulate. I have Altium but we don't pay for the simulator unfortunately.
     
  17. Bernard

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    I have eye ball & some solderless breadboards.
    Who has been feeding my thumbnails vitamins? They no not look any better blown up.
     
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  18. DanielLitwin

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    Quick question - I've been basing the design off plaque #8 and I can see that the clock, CLR, V+ and V- line up with the chip, but on U1, pin 3 goes to pin 1 on U4; Pin 4 on U1 and Pin 2 on U4. I guess maybe I'm confused because on U4, you have pin labelings on both sides of the IC. I understand that I want to start on the pin-state that I wish to start first; then the second, so on an so forth. I think it's just how this is labelled that confuses me.

    Also, for the SR, am I looking for push-pull, Open drain, etc.. and am I looking for serial to parallel or all the other varieties?

    Thanks Bernard!
     
    Last edited: Apr 28, 2017 at 11:34 AM
  19. Bernard

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    Here is a short attempt to show IC pins in normal position looking at the top of the ICs.
    The SR is push-pull, ULN-- is open collector.
    Why for the need of push-pull ? Dan\'s Plaque #13 00000.jpg
     
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