This is the data sheet for the MOSFET Link to data sheet Using equations, I worked out what my Rgate to be 2.36 ohms. where Rtest was a 470ohm ceramic block resistor (due to it getting quite hot when turned on) Connecting the oscillator, I see that I have this ring effect on the square wave as shown here:


Just wondering what the cause of this ring effect is or maybe a little detail on what it is and how to fix it? I increased the resistor value to 47 ohms which does lower the effect but why?



Also any ideas how I can calculate the Power loss of the MOSFET?

 

Nothing is possible without a schematic diagram of your circuit.

 

Nothing is possible without a schematic diagram of your circuit.

oops, sorry forgot to put that in

 

The effect is due to an excess of inductance and a lack of damping. The gate resistor provides damping and that is why it reduced the effect. You essentially have a 2nd order RLC circuit consisting of the resistor, the trace inductance, and the gate capacitance.

https://en.wikipedia.org/wiki/RLC_circuit

Is the box labeled "IN OUT" a level shifter?

 

The effect is due to an excess of inductance and a lack of damping. The gate resistor provides damping and that is why it reduced the effect. You essentially have a 2nd order RLC circuit consisting of the resistor, the trace inductance, and the gate capacitance.

https://en.wikipedia.org/wiki/RLC_circuit

Is the box labeled "IN OUT" a level shifter?

the IN OUT is a MOSFET driver - the data sheet is here: https://static.rapidonline.com/pdf/82-4036.pdf

 

Now looking back, I'm not too sure if I calculated this right. Is it right to assume that, to be able to fine Rgate, I'd have to work out the source inductance and then work out the Qfactor to find the Rgate? How would I be able to find the Q factor?

 

Now looking back, I'm not too sure if I calculated this right. Is it right to assume that, to be able to fine Rgate, I'd have to work out the source inductance and then work out the Qfactor to find the Rgate? How would I be able to find the Q factor?

It is not the source inductance you need, it is the inductance of the connections between the driver and the MOSFET gate. I estimated it to be 0.04 μH and I took the gate capacitance to be 180 pf. In a simulation 2.36 Ω was clearly underdamped and 47 Ω was critically damped. This is not exactly consistent with your scope traces so there is something missing. The MOSFET is capable of driving up to 1000 pf of capacitance of which you have maybe 20% or less. In my simulation I allowed for 50 ns rise and fall times; I see the driver has better specs than that which could be part of the problem. Fast rise and fall times on the driver will exacerbate the problem. On the other hand slow rise and fall times means the MOSFET spends more time in it linear region which is usually a bad bad thing.

 

It is not the source inductance you need, it is the inductance of the connections between the driver and the MOSFET gate. I estimated it to be 0.04 μH and I took the gate capacitance to be 180 pf. In a simulation 2.36 Ω was clearly underdamped and 47 Ω was critically damped. This is not exactly consistent with your scope traces so there is something missing. The MOSFET is capable of driving up 1000 pf of capacitance of which you have may 20% or less. In my simulation I allowed for 50 ns rise and fall times; I see the driver has better specs than that which could be part of the problem. Fast rise and fall times on the driver will exacerbate the problem. On the other hand slow rise and fall times means the MOSFET spends more time in it linear region which is usually a bad bad thing.

thats very informative thank you! For the gate capacitance, I used 900pF in my previous workings as I may have used a different data sheet which maybe why I got 2.36ohms. Would it be possible if you could show me your workings on how you got 0.04uH?
Also, how would you tackle in getting the rgate? I assumed that the qfactor was 0.5 -1 where 0.5 would be critically damped and 1 as under damped. And 0.75 was the ideal range. So i used that in my equation to find rgate.

 

Here is a snapshot of the simulation

 

When faced with ringing on a scope trace like this, it's also important to look closely at your probe ground lead connections. There are several discussions of this on AAC, including here, here, here, here and here.

The bottom line: when viewing fast risetime signals, keep your scope probe's ground connection as short as possible to avoid "phantom" ringing.

 

I estimated the trace inductance using the calculator on this website (AAC) for a trace 0.125" wide, 2" long, and 0,062" above a ground plane. The original value was 0.04 μH, but I increased it to 0.06 in the simulation to make the ringing more pronounced. The 180 pf is the parameter Ciss, Input Capacitance from the datasheet. There is some confusion over how the damping is described and what the numerical values mean. The wiki uses both α and ζ to refer to "damping factor" and I'm not sure which one you mean.

https://www.allaboutcircuits.com/tools/microstrip-inductance-calculator/

Yes, I know this is for microstrips for microwave applications, but it was the #1 Google hit for "Estimate Trace Inductance".

 

I estimated the trace inductance using the calculator on this website (AAC) for a trace 0.125" wide, 2" long, and 0,062" above a ground plane. The original value was 0.04 μH, but I increased it to 0.06 in the simulation to make the ringing more pronounced. The 180 pf is the parameter Ciss, Input Capacitance from the datasheet. There is some confusion over how the damping is described and what the numerical values mean. The wiki uses both α and ζ to refer to "damping factor" and I'm not sure which one you mean.

https://www.allaboutcircuits.com/tools/microstrip-inductance-calculator/

Yes, I know this is for microstrips for microwave applications, but it was the #1 Google hit for "Estimate Trace Inductance".

Thanks soo much for your information, this really helped me out and understand!

 

Thanks soo much for your information, this really helped me out and understand!

I'm glad to be of assistance.

 

I'm glad to be of assistance.

Sorry, another question which I can't seem to figure out. Whats the point of the MOSFET driver in the circuit and why is it of any use? https://static.rapidonline.com/pdf/82-4036.pdf Is this some kind of feedback so that the output can stay the same when using different loads?

 

There are several reasons why you might want to use a MOSFET driver chip.

1. Apply sufficient voltage to the gate to turn the device on to a point where rds(on) is at or near its minimum. Especially if your logic levet is not sufficient.
2. The push-pull output stage looks like a current source, which is what you want to charge and discharge the gate rapidly, to avoid the MOSFET's linear region.
3. Doing the equivalent functions in discrete components is a PITA.

This is not an exhaustive list, but I think it hits the main points. I'm sure that Alex (@Bordodynov) and @Audioguru again would have additional observations.

 

Whats the point of the MOSFET driver in the circuit

Basically to charge and discharge the MOSFET large gate capacitance as fast as feasible, so the MOSFET spends a minimum amount of time in the active region when switching states, which causes power dissipation proportional to the switching current times the switching time.

 

There are several reasons why you might want to use a MOSFET driver chip.

1. Apply sufficient voltage to the gate to turn the device on to a point where rds(on) is at or near its minimum. Especially if your logic levet is not sufficient.
2. The push-pull output stage looks like a current source, which is what you want to charge and discharge the gate rapidly, to avoid the MOSFET's linear region.
3. Doing the equivalent functions in discrete components is a PITA.

This is not an exhaustive list, but I think it hits the main points. I'm sure that Alex (@Bordodynov) and @Audioguru again would have additional observations.

Basically to charge and discharge the MOSFET large gate capacitance as fast as feasible, so the MOSFET spends a minimum amount of time in the active region when switching states, which causes power dissipation proportional to the switching current times the switching time.

Thanks a lot!!

 

If it is in fact the Mosfet. The gate of the mosfet may be the point of entry with respect to the radiated impulse in the lattice. Those studying this are mostly temperamental and would force a square peg in a round hole in my experience. What is known about ringing in general in my own words might be helpful if someone is really interested in how.
In a damped wave the two most common components involved are the inductor and capacitor however diodes can also be included. It is common to find parasitics at the gate pins. In the case of unwanted ringing the two components (usually) going into resonance are called the parasitic components. There is a relationship between the Q and the number of iterations in the ringing wave at the resonating frequency. The ringing initiates after a short quick impulse. This pulse can originate inside the circuit or outside or both. The experimenting on diodes I attribute to Dr Ronald Stiffler, he left an equation that he said works. The equation was a collaboration effort I think and possibly the author is still around.

 

Application notes on this topic -

https://www.ppi-uk.com/wp-content/u...esistor-Principles_and_Applications_rev00.pdf

https://toshiba.semicon-storage.com/info/docget.jsp?did=59460

http://www.ti.com/lit/an/slla385a/slla385a.pdf

https://www.infineon.com/dgdl/Infin...N.pdf?fileId=5546d462518ffd8501523ee694b74f18


Regards, Dana.

 

And scope probing issues -

https://assets.testequity.com/te1/Documents/pdf/keysight/Better-Scope-Probing.pdf


Regards, Dana.