When I scope ttl full can oscillators I measure their outputs overshooting the edges more than 0.5 volts above 5v and below ground. The overshoot can be as high as a volt and higher. Isn't this bad for the inputs of logic chips? I'm relatively new to tll and cmos at 1Mhz and higher. One thing I thought of is I can buffer the oscillator output with a cmos 4050 which accepts inputs above the supply voltage. When I improve my probes grounding the overshoots reduce. So far I haven't seen any problems that occurred with the circuits I've built.