hi,
You could try this SLA sim.
Unzip the files.

sc = state of charge 0 > 1
nc =number of 2V cells.
E
View attachment 338191

R1 is the serious parasitic resistance of the battery? Or does it simulate the load?

 

Hi,
It is just demo dummy load for the battery check, to show it working
E

 

Hi,
It is just demo dummy load for the battery check, to show it working
E

Hi Eric, sorry to bother you again.
I would like to take up the discussion we talked about a couple of weeks ago.
I repost in this thread because it has to do with previous simulations and the same schematic LTSpice .. with the addition of an efficiency comparison between EPC2152 and LM5109B.

After my simulations I plotted efficiency vs current graph between EPC2152 (GaN) and LM5109B (SiC) in order to compare them:

View attachment 340863
1) What I don't understand is why the efficiency of LM5109B at 10kHz is higher than the others ... that is, why it doesn't follow the trend it has for 30kHz, 60kHz, and 100kHz.

..and maybe it's correlated to:
2) What is the difference between calculating the power of the EPC driver by doing pin_rms - psw_rms (like I did in the schematic) compared to what I get if I hold down "shift" on the EPC by making the thermometer icon appear ? Are both of them correct? ..consider that in the case of "shift" I get a few mW dissipated, while with the rms formula I get a few W

The only thing that needs to be chosen in the attached .asc schematic is the duty cycle D (which varies from 0.05 to 0.20 for my application) and the frequency. You can keep 10kHz.

Thank you in advance for your availability

 

hi k89,
Please post the LM5109B asy file.
E

 

hi k89,
Please post the LM5109B asy file.
E

Hi Eric.
I've reorganized the graphs and simulations a little bit and I'd like to show them to you.

I remind you that the circuit is this for EPC2152:


And the circuit is this for LM5109B:


I didn't report it explicitly in the schematics above, but I simulated both the circuits with .step param D 0.05 0.1 0.15 0.20 0.25 0.3 0.35 0.4 in order to obtain an output current range from 6A to 50A

With the .meas on the left I found the following data for EPC2152:


With the .meas on the left I found the following data for LM5109B:



In this first graph I plotted Efficiency vs Iload at difference Frequencies for currents up to 25A (so ducty cycle max 20%):
figure 1


In this second graph Efficiency vs Iload only at 60kHz but for currents up to 50A (so ducty cycle max 40%)
figure2


What I don't understand is precisely the trend of figure 2, which does not take into account switching losses (because the frequency is always the same 60kHz) but simply takes into account conduction losses R*Iload^2:
figure 3

Since conduction losses increase with increasing load current (figure 3) ... shouldn't efficiency (in figure 2) decrease as Iload increases? ..which does not happen (figure 2) .. the opposite happens!

At this point I also ask you for feedback on figure 1

 

Hi Eric.
I've reorganized the graphs and simulations a little bit and I'd like to show them to you.

I remind you that the circuit is this for EPC2152:
View attachment 342045

And the circuit is this for LM5109B:
View attachment 342049

I didn't report it explicitly in the schematics above, but I simulated both the circuits with .step param D 0.05 0.1 0.15 0.20 0.25 0.3 0.35 0.4 in order to obtain an output current range from 6A to 50A

With the .meas on the left I found the following data for EPC2152:
View attachment 342054

With the .meas on the left I found the following data for LM5109B:
View attachment 342056


In this first graph I plotted Efficiency vs Iload at difference Frequencies for currents up to 25A (so ducty cycle max 20%):
View attachment 342051 figure 1

In this second graph Efficiency vs Iload only at 60kHz but for currents up to 50A (so ducty cycle max 40%)
View attachment 342058 figure 2

What I don't understand is precisely the trend of figure 2, which does not take into account switching losses (because the frequency is always the same 60kHz) but simply takes into account conduction losses R*Iload^2:
View attachment 342057figure 3
Since conduction losses increase with increasing load current (figure 3) ... shouldn't efficiency (in figure 2) decrease as Iload increases? ..which does not happen (figure 2) .. the opposite happens!

At this point I also ask you for feedback on figure 1

I do NOT have the .asy files of the two components, I have:
RAW files
PLT files
LIB files

 

I do NOT have the .asy files of the two components, I have:
RAW files
PLT files
LIB files

If you think so I can open a new post so that maybe other people will respond

 

hi k89,
If you consider that there is a change from the original topic, creating a new thread would be the correct action.??

E

 

hi k89,
If you consider that there is a change from the original topic, creating a new thread would be the correct action.??

E

Perfect.
Thank you for your patience

https://forum.allaboutcircuits.com/threads/efficiency-and-losses-in-gate-driver-ltspice.205301/