In the schematic below:
The circuit is behaving as a comparator. When V+>V- the output is at 12V. When V+<V- the output is 0. (the positive pin power supply of the op-amp is connected to 12V and the nagative pin power supply is connected to ground).
The problem is when I try to do the math derivation to justify the behavior of the op-amp, I don't get what that comparator effect.
Here is the math derivation:
At V- (pin6), we have 6V because of the voltage divider R33/(R31+R33). Which means that we should get 6V at the V+(pin 5).
To make it simple, no currents flow in pins 5 and 6 (in reality there are some pAmps). the current flowing in R35 is (7V-6V)/R35=0.14mA.
then this current is flowing also in R34, since V5 is at 6V, the voltage at pin 7 (the output) is 2.93V (20kR*0.14mA). In LTspice I got at pin 7 12V.
I would like to know how I can justify the behavior of such circuit.
The circuit is behaving as a comparator. When V+>V- the output is at 12V. When V+<V- the output is 0. (the positive pin power supply of the op-amp is connected to 12V and the nagative pin power supply is connected to ground).
The problem is when I try to do the math derivation to justify the behavior of the op-amp, I don't get what that comparator effect.
Here is the math derivation:
At V- (pin6), we have 6V because of the voltage divider R33/(R31+R33). Which means that we should get 6V at the V+(pin 5).
To make it simple, no currents flow in pins 5 and 6 (in reality there are some pAmps). the current flowing in R35 is (7V-6V)/R35=0.14mA.
then this current is flowing also in R34, since V5 is at 6V, the voltage at pin 7 (the output) is 2.93V (20kR*0.14mA). In LTspice I got at pin 7 12V.
I would like to know how I can justify the behavior of such circuit.