Not if it's properly driven and terminated.

Thanks @crutschow

I have no problem with your comment, but I'd disagree.

Like you, been at it many years,

and as soon as I see a digital design done by analog engineers I shudder.
I must also say, I do RF / analog, and many a real analog engineer shudders at my RF designs,
my only excuse is my RF designs are not for production, so good enough is all thats needed.

The number of digital systems that end up having a sine wave sent to a analog designed digital section that I see having problems is amazing. To us in digits, things have to align on the edges, edges have to be sharp else you end up with jitter, especially if there is noise around the sample point which on Coax there always seems to be high frequency noise,
Analog guys then try to filter the noise out, adding band pass / low pass circuits,
makes clock better but adds a temperature / voltage / time variable delay to the clock,
and as digital people , we have strict timing limits, we have problems with a variable clock,.

Now days , I try to make certain the interface to any analog system is asynchronous,
with the data encoded with its clock,
and if a clock is needed clock is sent via differential pair, with a decent LVDS driver / receiver,
unless clock is only for analog use, when its a nice sine wave ,


( I once had to de bug a timing system designed by analog engineers, to change the timing sequence,
it was multiple mono stables
another time, I had a design to re design, that had multiple clocks going into it, all over coax, and surprise, as the temperature changed or over time, the digits fell over, due to clock set up / hold drifting..
)

I am in aw as to what analog engineers do, but they can not design digits

 

Let's backup for a moment.

Seeing ringing or "glitches" on sharp transitions is normal if you don't have the right setup.
I don't do simulations so let's discuss the real thing with real components and equipment.

Every connection is a transmission line.

The oscilloscope probe and connecting cable is a transmission line. What you observe on the oscilloscope screen may already be a corrupted rendition as a result of the probe and cable. You need the shortest connection at your probe tip and ground.




https://www.edn.com/build-your-own-oscilloscope-probes-for-power-measurements-part-1/

Make sure that your oscilloscope + probe is properly adjusted for frequency compensation.

There are different probes/cables for different situations: 50Ω cables, x10, x100 probes.

Next, let us look at the actual op-amp output. Every output has a source impedance. The source impedance and the load impedance must match the characteristic impedance of the transmission line. If you are using 50Ω cable, add a series resistance at the op-amp output to bring the net source impedance to 50Ω. At the receiving end of the cable, use a 50Ω terminating resistor from signal to ground. The effect of this is a voltage divider that will result in 50% signal amplitude.

If you want to build a test jig for your setup, it is customary to place a small cable connector directly on to the PCB right next to the output of the op-amp for evaluation purposes.

 

See
View attachment 234747

Thank you

 

Re double terminating , That refers to the output of the op amp,
I assume the output of the op amp is driving a coax line ?
You have "50" ohms in series on the output, and then you terminate 50 ohms at the far end.
Thus you end up with a voltage divider of the 7.6 volts by two, to give 3v3 at the far end.

ESD protection,
is needed on any equipment that connects externally,
inputs or outputs,
If its only ever in the lab, then dont worry to much , but if its ever going out side lab, you need it.
Why capacitance of ESD protection matters, because its in parallel with your output, thus making an RC low pass filter.


gain comes direct from the data sheet,
op amps are only stable up to a certain frequency at a given gain, part of phase compensation, but that's above me,

At a few MHz, your ok with this part,

But it doe snot answer basic question,
why are you sending clock over coax not a diff pair ?

Coax is analog, this is a digital square wave is it not ?
"all" your interested in is the edges, and coax is about the worst way to send digital square edges.

" I assume the output of the op amp is driving a coax line ?" No. The output of the Opamp is providing clock signals to our
ASIC. This is an ASIC evaluation board.The clock input is coming to OPAMP via SMA Cable(135101-01-12.00).
"why are you sending clock over coax not a diff pair ?" My ASIC accepts single-ended clocks only.

 

Let's backup for a moment.

Seeing ringing or "glitches" on sharp transitions is normal if you don't have the right setup.
I don't do simulations so let's discuss the real thing with real components and equipment.

Every connection is a transmission line.

The oscilloscope probe and connecting cable is a transmission line. What you observe on the oscilloscope screen may already be a corrupted rendition as a result of the probe and cable. You need the shortest connection at your probe tip and ground.

View attachment 234767


https://www.edn.com/build-your-own-oscilloscope-probes-for-power-measurements-part-1/

Make sure that your oscilloscope + probe is properly adjusted for frequency compensation.

There are different probes/cables for different situations: 50Ω cables, x10, x100 probes.

Next, let us look at the actual op-amp output. Every output has a source impedance. The source impedance and the load impedance must match the characteristic impedance of the transmission line. If you are using 50Ω cable, add a series resistance at the op-amp output to bring the net source impedance to 50Ω. At the receiving end of the cable, use a 50Ω terminating resistor from signal to ground. The effect of this is a voltage divider that will result in 50% signal amplitude.

If you want to build a test jig for your setup, it is customary to place a small cable connector directly on to the PCB right next to the output of the op-amp for evaluation purposes.

View attachment 234768

May I know the Part Number of the cable connector.

 

Can I check, your ASIC needs a 7v clock input ?

 

Can I check, your ASIC needs a 7v clock input ?

ASIC NEED CLK amplitude between 1.8V to 3.6V is fine.Please see the clk distribution circuit below

 

Thank you

That is a great schematic, very useful to help us understand the depths of your question.

To re cape.

The ASIC needs a single ended logic input of 0 to 3v3 ?

The signal coming into the board is 0 to 3v3 , over coax, 50 Ohms source impedance ?

So this implies as you have done that the board needs to have a 50 Ohms input termination.

What is the input impedance of the ASIC ?
is the ASIC input a logic input or an Analog 50 Ohms input ?

At the moment, if the ASIC input is digital , as 0 to 3v3 implies, then you are driving the ASCI at 0 to over 7 volts.

If the ASIC is needing a logical clock input, then the thing to use is a logic clock driver,
they have jitter attenuator and delay compensation built in for just this sort of situation.

the important thing we need to know is what is the input specification of the clock input of the ASIC ,