Dear Team,
I am designing a clock distribution network using LM7171. This opamp is used in the non-inverting configuration with a gain of 2. My input clock frequency is 2.4Mhz, Amplitude is 3.6V.I can see glitching at the output. May I know where I went wrong?Please find the circuit diagram input output waveforms etc.
Circuit Diagram

I/O Waveforms


Regards
HARI

 

The overshot, undershoot, and ringing are all classic signs of poor bypassing on the power supply. You need bypass capacitors on the rails.

 

The overshot, undershoot, and ringing are all classic signs of poor bypassing on the power supply. You need bypass capacitors on the rails.

Thank you very much.In the real circuit I have given all bypassing and decoupling. Do I need to provide in the simualtions

 

Thank you very much.In the real circuit I have given all bypassing and decoupling. Do I need to provide in the simualtions

If you add it does the distortion go away?

 

If you add it does the distortion go away?

No it is still there I think I need to add a compensation capacitor across the feedback resistor

 

See

 

See
View attachment 234673

Hi Thank you very much.
Could you please briefly explain this

 

See

 

SeeView attachment 234674View attachment 234675

thank you so I need to put a capacitor.
Could you please send me the simulation file.
May i know from where you get the simulation model of Lm7171 for LTSPICE

 

I don't remember where I got the model from. You can get my collection here:

http://bordodynov.ltwiki.org/

 

... Intuitively, it seems like the overshoot at the corner of the output waveform may be related to a damping factor embedded in the op-amp circuit somehow. As an experiment, try placing a 100 ohm resistor in series with the input signal, to see if there is any noticeable improvement.
... One more thought, how are you placing the decoupling capacitors? You need one high frequency ceramic capacitor of about 0.1 μF, and one lower frequency electrolytic capacitor of about 10 μF, both placed directly across the op-amp power input. The reason for the ceramic capacitor is that the physically larger electrolytic capacitor has a metallic electrode that produces an inductive reactance component at high frequencies.

 

For such a small capacitance you could use a gimmick capacitor.
It has the advantage of being easily adjustable for the proper compensation value.

 

... Intuitively, it seems like the overshoot at the corner of the output waveform may be related to a damping factor embedded in the op-amp circuit somehow. As an experiment, try placing a 100 ohm resistor in series with the input signal, to see if there is any noticeable improvement.
... One more thought, how are you placing the decoupling capacitors? You need one high frequency ceramic capacitor of about 0.1 μF, and one lower frequency electrolytic capacitor of about 10 μF, both placed directly across the op-amp power input. The reason for the ceramic capacitor is that the physically larger electrolytic capacitor has a metallic electrode that produces an inductive reactance component at high frequencies.

Please see my decoupling network.I did not use any electrolytic capacitor

 

... ok ... Try placing a single 100 nFceramic capacitor between the two power rail pins, that is +15 to -15 ... That is, use no other ceramic capacitors... In order to see if somehow an undesireable inductive reactance is being introducd.

 

taking step back.
Your driving out 7 and a bit volts peak to peak ,
what is this driving ?

Im wondering if its a long length of Coax that your double terminating ,
to get 3v3 at the far end ?

If so , then the coax is going to have a significant effect on the signal , more than you are seeing in your simple simulation.

What frequency clock are you expecting,

The LM7171 only has a gain of 3 at below 220 MHz,

as a square wave needs at least the 9th harmonic, your limited to around 25 Mhz.
at the far end you might have to use a Schmitt trigger circuit to make the almost sine wave into a decent square clock waveform.

These amps also have poor ESD protection, so you should add a ESD protection circuit,

If this is Coax,
and its needed for a clock
then the normal way to send a clock is over differential lines, not coax,
and use a chip like the Sn65LVDS386,

I normally run into this sort of problem when a board that needs a clock, has been designed by an analog expert,
such as a DAC or ADC.
They only think 50 / 75 Ohms,
and thats terrible for a clock ,

If it is a ADC, remember the resolution of the ADC is highly dependent upon the jitter on the clock,
sending clock over coax, almost guarantees jitter as the edge has been lost,
and you want the edge to go past the "window" in the input sensitivity of the clock receiver as quick as possible.
in which case, I'd filter at the receiver, to a sine wave, and then put through a fast Schmitt trigger, which normally has a differential output , that is required by high speed ADC's.

Good luck,

 

SeeView attachment 234674View attachment 234675

May I know how you are printing Legends in LTSPICE.I can see a box that shows different capacitor values.

 

taking step back.
Your driving out 7 and a bit volts peak to peak ,
what is this driving ?

Im wondering if its a long length of Coax that your double terminating ,
to get 3v3 at the far end ?

If so , then the coax is going to have a significant effect on the signal , more than you are seeing in your simple simulation.

What frequency clock are you expecting,

The LM7171 only has a gain of 3 at below 220 MHz,

as a square wave needs at least the 9th harmonic, your limited to around 25 Mhz.
at the far end you might have to use a Schmitt trigger circuit to make the almost sine wave into a decent square clock waveform.

These amps also have poor ESD protection, so you should add a ESD protection circuit,

If this is Coax,
and its needed for a clock
then the normal way to send a clock is over differential lines, not coax,
and use a chip like the Sn65LVDS386,

I normally run into this sort of problem when a board that needs a clock, has been designed by an analog expert,
such as a DAC or ADC.
They only think 50 / 75 Ohms,
and thats terrible for a clock ,

If it is a ADC, remember the resolution of the ADC is highly dependent upon the jitter on the clock,
sending clock over coax, almost guarantees jitter as the edge has been lost,
and you want the edge to go past the "window" in the input sensitivity of the clock receiver as quick as possible.
in which case, I'd filter at the receiver, to a sine wave, and then put through a fast Schmitt trigger, which normally has a differential output , that is required by high speed ADC's.

Good luck,

"I'm wondering if its a long length of Coax that your double terminating,
to get 3v3 at the far end ?" The clock is coming from a function generator using SMA cable.

"What frequency clock are you expecting," The clock frequency Min=2.4Mhz Max=3.6MHz

"These amps also have poor ESD protection, so you should add an ESD protection circuit,"--You mean I need to put ESD diodes on the Input of OPAMPS. May I know will the capacitance of ESD diodes cause any problems.

"The LM7171 only has a gain of 3 at below 220 MHz,"--May I know how you obtained this value

This board is designed by Analog Team

 

May I know how you are printing Legends in LTSPICE.I can see a box that shows different capacitor values.

See

 

"I'm wondering if its a long length of Coax that your double terminating,
to get 3v3 at the far end ?" The clock is coming from a function generator using SMA cable.

"What frequency clock are you expecting," The clock frequency Min=2.4Mhz Max=3.6MHz

"These amps also have poor ESD protection, so you should add an ESD protection circuit,"--You mean I need to put ESD diodes on the Input of OPAMPS. May I know will the capacitance of ESD diodes cause any problems.

"The LM7171 only has a gain of 3 at below 220 MHz,"--May I know how you obtained this value

This board is designed by Analog Team

Re double terminating , That refers to the output of the op amp,
I assume the output of the op amp is driving a coax line ?
You have "50" ohms in series on the output, and then you terminate 50 ohms at the far end.
Thus you end up with a voltage divider of the 7.6 volts by two, to give 3v3 at the far end.

ESD protection,
is needed on any equipment that connects externally,
inputs or outputs,
If its only ever in the lab, then dont worry to much , but if its ever going out side lab, you need it.
Why capacitance of ESD protection matters, because its in parallel with your output, thus making an RC low pass filter.


gain comes direct from the data sheet,
op amps are only stable up to a certain frequency at a given gain, part of phase compensation, but that's above me,

At a few MHz, your ok with this part,

But it doe snot answer basic question,
why are you sending clock over coax not a diff pair ?

Coax is analog, this is a digital square wave is it not ?
"all" your interested in is the edges, and coax is about the worst way to send digital square edges.

 

coax is about the worst way to send digital square edges.

Not if it's properly driven and terminated.