Issue simulating a three phase bridge in LTspice

Xavier Pacheco Paulino

Joined Oct 21, 2015
728
I'm simulating a simple three phase bridge rectifier that I have attached. I'm learning LTspice, so I don't know many tricks yet. The point is that everything is fine until I add the line inductors. Why do the inductors disrupt the waveform like that? The green waveform is before the inductor, and the blue waveform after the inductor. I took V1 as example. The same pattern repeats at V2 and V3.

The inductor and capacitor values are taken from a real application circuit. The rectifier diodes breakdown voltage is 1000V, however, the highest I found in LTspice is 750V.

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crutschow

Joined Mar 14, 2008
32,926
Label the nodes, so it's easier to know what I'm looking at (Use Edit/Label Net command).

Adding the inductors creates a resonant circuit, which generates ringing from the diodes suddenly turning off each cycle.
In real life, there may be enough parasitic/stray series resistance in the circuit to damp that ringing.
What is the resistance of the actual inductors in the real application circuit?

Xavier Pacheco Paulino

Joined Oct 21, 2015
728
Attached is the whole circuit I want to simulate. The 675V DC bus voltage comes from the three phase rectified. The inductors used in the power lines are RL-1294-680 .

Give me a while and I post my .asc file.

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Bordodynov

Joined May 20, 2015
3,092
In the scheme presented, not enough high-voltage diodes are used and very high currents develop. I replaced the diodes with higher voltage diodes and everything became normal. I need diodes for voltages of at least 1200 V. I have taken on 2000 V.

Xavier Pacheco Paulino

Joined Oct 21, 2015
728
In the scheme presented, not enough high-voltage diodes are used and very high currents develop. I replaced the diodes with higher voltage diodes and everything became normal. I need diodes for voltages of at least 1200 V. I have taken on 2000 V.
View attachment 180184
Where do I get those high voltage diodes models?

Bordodynov

Joined May 20, 2015
3,092
The fastest thing you can do is find the files on my web page:
http://bordodynov.ltwiki.org
This is a small CMP.zip file.
Write the contents into the "cmp" folder. Read my page carefully, especially where the files should be stored.
...LTspiceXVII\lib\cmp

Xavier Pacheco Paulino

Joined Oct 21, 2015
728
The fastest thing you can do is find the files on my web page:
http://bordodynov.ltwiki.org
This is a small CMP.zip file.
Write the contents into the "cmp" folder. Read my page carefully, especially where the files should be stored.
...LTspiceXVII\lib\cmp
Ok. I'll have a look. Another question: the circuit I want to simulate, the one I attached in post # 3, uses a 43V zener diode, but LTspice standard library does not have it. Can I use two zener in series? 33V and 10V.

Bordodynov

Joined May 20, 2015
3,092
Yes, you can turn on the zener in sequence. If you downloaded my models, there is a 43V Zener. This is BZX384B43.

Xavier Pacheco Paulino

Joined Oct 21, 2015
728
This is what I got for the bridge. I will continue with the circuitry after the bridge. I have attached my .asc also. What are the other waveforms you took?

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Xavier Pacheco Paulino

Joined Oct 21, 2015
728
I have updated the .asc file by adding the rest of the circuit. I think I'm having issues with the -13V reference. I added a 290 ohm resistor as the load for the FET. The coil in the real circuit has a DC resistance of 290 ohm +/- 10%. I don't have the expected 13.25V at the output of the LM317 with respect to GND.

This is what I expect from the circuit (See attachment Module.PNG) :

"As the ground is defined as the point between the two output capacitors, then D15 establishes the most negative voltage as -13V.
D14 then puts the ADJ pin of the regulator at +12V, which means that the regulator output is 12 + 1.25 = 13.25V.
D8 regulates the gate of Q1 at 43V above the negative rail, for an absolute voltage of +30V relative to ground. Note that Q1 is wired as a current limiter.

Since I'm measuring the input of the regulator at +27V, then there's a difference of 3V between that point and the gate of Q1. Most of this is the threshold voltage of Q1, but there will also be a voltage drop across R2 + R3 that depends on the load current.

D7 limits that voltage to 10V at most, which means that the maximum current that can flow through R2 + R3 is about 7/515 = 13.6 mA — at which point, the input voltage to the regulator will have dropped to about 20 V. Presumably, this range of current is not enough to activate the coil.

If TR1 is triggered, then the current is limited only by R2, which means that about 1.37 A will flow through the coil, at least until the power source is cut off. When the coil is turned on, the power line is removed."

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Bordodynov

Joined May 20, 2015
3,092

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Xavier Pacheco Paulino

Joined Oct 21, 2015
728
Good! I have also measured V(P, -13) and I get about 1.1 kV, why is that?

Bordodynov

Joined May 20, 2015
3,092
679*3^0.5 = 1176.

Xavier Pacheco Paulino

Joined Oct 21, 2015
728
679*3^0.5 = 1176.
But if the line-to-line voltage is 480VAC rms, shouldn't the voltage across the capacitor be the peak voltage of 679 VDC? I got a bit confused when I saw 1.1 kV across the cap in the simulation.

Bordodynov

Joined May 20, 2015
3,092
Even more interesting:

Xavier Pacheco Paulino

Joined Oct 21, 2015
728

Bordodynov

Joined May 20, 2015
3,092
Look at the diagrams, and I think you'll understand. As for where to read, I'm not your assistant here.