I have to design a double tail comparator for a 1GHz frequency and difference in voltage of 5mV. I should also do the pre and post layout simulation in 180nm. optimized your design for low delay. using Cadence Virtuoso.
The problem I'm facing is one of the output(Outm) is correct and is able to sweep from 0V to1.8V, but not the other output (Outp).
How do i fix it whats wrong with my schematic?
How do I get Outp to negate and sweep from 0V to 1.8V?

MOD NOTE: Moved to Homework Help.

 

According to your description (180 nm ASIC-design, using Cadence Virtuoso) I assume this is not a hobby or DIY-project but a commercial one. Therefore commercial support rates will apply.

 

I have to design a double tail comparator for a 1GHz frequency and difference in voltage of 5mV. I should also do the pre and post layout simulation in 180nm. optimized your design for low delay. using Cadence Virtuoso.
The problem I'm facing is one of the output(Outm) is correct and is able to sweep from 0V to1.8V, but not the other output (Outp).
How do i fix it whats wrong with my schematic?
How do I get Outp to negate and sweep from 0V to 1.8V?

Is this "homework"

 

Is this "homework"

Kind of this is my mini-project

 

Kind of this is my mini-project

This should be in the homework section then..