drive mosfet with 3.3V, minimal component count

Thread Starter

mikewax

Joined Apr 11, 2016
181
i have a 3.3v digital pin, attempting to use a PNP to switch an Nfet (Vdrain=5v) on/off at a rate of 1kHz. i can't use the inverting-NPN method to drive the gate because that way the Nfet would be on for a few mS after POR. Here's my circuit with a minimal # of parts:
gate5v.PNG
Am i full of it? Is there a way to do it with fewer parts?
thanx
 

crutschow

Joined Mar 14, 2008
28,161
Am i full of it?
Don't know about that, but a PNP needs a negative supply to the collector, not positive to operate as a switch, since a positive voltage forward biases the collector-base junction.
i can't use the inverting-NPN method to drive the gate because that way the Nfet would be on for a few mS after POR
What happens during POR?

What is the N-MOSFET switching?
 

Ian0

Joined Aug 7, 2020
3,754
What happens during POR?
This is the important question - during Power-on reset some microcontrollers have pullups enabled, so that the output is high, and some have pullups disabled so the output is floating.

Also, are any of the MOSFET's terminals connected to the same power supply as the microcontroller? If so, which?
If the Drain is connected to +5V, and the load is connected to the source, then you will need a higher voltage than +5V in order to switch it on, if you don't have a higher voltage handy, then a P-channel FET would be a better choice..
 
What kind of load are you switching? A 2n7000 will work on 3.3 and eliminate most everything else. Just a resistor between gate and ground to keep it off at power up (1 meg has always worked for me assuming no internal pull up from controller)
 
Actually wouldn't you want R1 between the base and the controller? And reverse your transistor C and E. I think I see where you are going and want to know how it works out.
 

dl324

Joined Mar 30, 2015
13,505
i have a 3.3v digital pin, attempting to use a PNP to switch an Nfet (Vdrain=5v) on/off at a rate of 1kHz. i can't use the inverting-NPN method to drive the gate because that way the Nfet would be on for a few mS after POR.
You should have the same problem with a PNP transistor because the real problem seems to be that the output is LOW when power is first applied. Resistor values would give us a better idea of what would happen when the control signal was LOW.

With R1, you reduce the voltage on the gate of the MOSFET. What is its threshold voltage? Part numbers would be helpful.

You're using the transistor in inverted mode. Is that what you intended?

The FET you're using is an enhancement mode N channel MOSFET. There are many types of FETs (JFET, IGFET, MESFET, ...). When I see FET, I think JFET because they were the first to be built and omitting J made sense because there was only one type of FET.

Enhancement mode MOSFETs are more common than depletion mode, so we usually don't mention mode unless it's depletion.
 
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Thread Starter

mikewax

Joined Apr 11, 2016
181
DOH i had the PNP bass-ackwards. Here's the correct circuit (the LOAD isn't actually a R, it's a purely resistive heating element).
- after POR the pin is Hi-Z and stays that way until the boot loader timeout expires. can't leave the Nfet on that long so i am using an inverted logic but i can't use an NPN.
- what are my chances of finding a depletion-mode Nfet in a TO251 package, with Rds < 100m, and what would it cost?
- according to the Nfet data sheet, Rds = 110m (Vgs=4) or 80m (Vgs=5). That little bit of Rds makes a difference to my reichsfuhrer managers ("Vhat is zee efficienzeeeeee??"), that's why the PWM is only about 1200Hz.
- But zhey alzo vant me to use fewer componentz. I told zhem to eat scheisse.
gate5v.PNG
 

crutschow

Joined Mar 14, 2008
28,161
after POR the pin is Hi-Z and stays that way until the boot loader timeout expires. can't leave the Nfet on that long so i am using an inverted logic but i can't use an NPN.
So why not drive the enhance-mode N-MOSFET directly with the INT0 signal?
With a 10k gate resistor to ground, the MOSFET will be off when the INT0 output is Hi-Z.
Then a 3.3V signal from INT0 output will turn it on.
 

crutschow

Joined Mar 14, 2008
28,161
But not on enough
Okay.
How about this circuit (LTspice simulation below) which uses only 2 resistors and one NPN transistor besides the MOSFET:
It biases the NPN ON when the input is Hi-Z (S1, which simulates the micro Hi-Z output, is open, green trace) so that the MOSFET is off (yellow trace) for that condition.
A low on the input (S1 closed) then turns off Q1 which turns on the MOSFET with a full 5V on the gate.

Will that work for you?

1626395906375.png
 
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Irving

Joined Jan 30, 2016
2,308
Then try a better MOSFET. The one you've selected isn't bad but it's not great. You want \(I_D\) to be better than 1.5A with \(V_{GS}\) at 3v. Your choice wont go below a \(V_{DS}\) of about 0.2v at that current.

I've been testing various MOSFETs to see which works better at 3v drive. An IRLZ44N is somewhat better, it'll give an \(I_D\) of nearly 3A at a \(V_{DS}\) of 0.1v

The best so far is a Nexperia PSMN017-30PL. This gives an \(I_D\) of around 4A at a \(V_{DS}\) of 0.15v.

Now these are all TO-220 cases so don't need heatsinks at this level. Although there are even better more modern devices in SMD packages I dont use them as much because they don't breadboard so easily and can get thermally challenged without a decent amount of copper around them.

And for those that roll out the 2N7000 mantra every time, Tbh they are pretty poor at 3v, with an \(I_D\) of around 75mA at a \(V_{DS}\) of 0.4v.

On the subject of power up, I've yet to meet an uC that powers up with anything but a Hi-Z input on a GPIO, gauranteed by design, with the exception of some specialist output only ports on some high-end STM32 devices. It's a non-issue.
i usually put a small resistor between GPIO pin and gate to limit peak gate current and protect the output pin. 10 - 50ohm is fine unless you want sub-100nS switching times in which case you need to do something cleverer. For heaters, relays, hi-power LEDs, etc. its not an issue.

If you're really paranoid, a 100k resistor from gate to source will drain off any charge that may have accumulated while powered-off.
 
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Thread Starter

mikewax

Joined Apr 11, 2016
181
The best so far is a Nexperia PSMN017-30PL. This gives an \(I_D\) of around 4A at a \(V_{DS}\) of 0.15v.
That does look like a viable one to try if i could make enough space for a TO220 on our next version.
i usually put a small resistor between GPIO pin and gate
So do i but it looks like Zapper's (#12) circuit won't require that. I'm thinking i'll set the data bit low and drive the gate by toggling the direction bit, so it will go from Output Low to Input.
THANX :)
 
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