View attachment 270467
View attachment 270468
View attachment 270469
Both pictures are quoted from here and here. I am trying to simulate it in LT Spice using Logic gates as the Level Triggered D Type Flip-flop and this circuit converts f to f/2 that is halving the input frequency.
However, I got the error timestep is too small in LT Spice. May I know how to solve this? Below is my LT Spice file attached.
Thank you for reading and have a nice day
View attachment 270468
View attachment 270469
Both pictures are quoted from here and here. I am trying to simulate it in LT Spice using Logic gates as the Level Triggered D Type Flip-flop and this circuit converts f to f/2 that is halving the input frequency.
However, I got the error timestep is too small in LT Spice. May I know how to solve this? Below is my LT Spice file attached.
Thank you for reading and have a nice day
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