How did they get the truth values for the unclocked D-type flip flop?The whole circuit is just nonsense. It is nothing more than a grossly over elaborate true-complement buffer. It isn't a flip flop at all, There is no mechanism to de-assert both SET and RESET.
EDIT: The truth table and the signal drawings are both wrong. If D is 0, Q is 1.
I think the circuit shown is just meant to be an intermediate step in going from an R'S' FF to a D latch. The author either didn't realize that, without the clock suppression circuit, the input signals need to be inverted or figured that it would be too confusing to point it out. Of course, in ignoring it he made the circuit incorrect and made it even more confusing.I don't see how the first circuit can be called a flip-flop or latch as it has no memory function and does neither.
Its truth table is just that of an inverter and non-inverter.
I agree -- but this author chose a different route. Maybe a good one, maybe a bad one, but their choice to make. It's more troubling (to me) that they would seem to have fumbled the ball using their chosen approach, but that may truly be simply a silly mistake like we all make. But it could also be that this is a case of the blind leading the blind, which is all-too-common, especially in works with words like "practical" and "for inventors" in the title. Often these are written by people who, themselves, do not have a firm foundation in the fundamentals and have decided to help others that have as poor a grasp as they do -- the intentions are usually commendable, but the execution is often lacking.I think a much more sensible progression would be an RS flip flop, a gated version and finally the D version.
I wouldn't call the final product "clocked" either. Maybe general parlance has changed, but that used to be a "gated latch."
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by Steve Arar
by Jake Hertz