
It doesn’t make them conduct “equally”, it removes the gap when the input signal is between ±0.6V when neither of them is conducting, by adding 0.6V to the NPN base signal and subtracting 0.6V from the PNP base signal, so that when the input signal is 0V, both transistors are just starting to conduct (If you‘re lucky).
Depending on the actual values of Vbe for the transistor, and the forward voltage drop of the diodes and the temperature, they might be biased just right, or they might still not be in conduction, or they might be conducting so much that they overheat.
Look up “emitter follower” and note that the output of an emitter follower is 0.6V less than the input.
[Note that I use the figure of 0.6V for the voltage drop of a silicon diode. It is a generic figure - in a real diode it can vary from 0.5V to 0.8V depending on the current, the temperature and the type of diode.]
Yes. Just put it in SPICE as you drew it in your sketch. Leave out the capacitors and connect the input signal to the junction of the two diodes.Hello Ian0, Is there a way i could simulate in LTspice this phenomena.
could you please give me simulation guidelines i could try to follow so i could see this phenomena?
Thanks.