I need to use a high-capacity mass storage device (SSD, NVMe) with an FPGA (I'm using Trion from Efinix). Since I think it's very difficult to use SATA/PCIe interfaces natively with these FPGAs, I was thinking of implementing a USB host and then using an external USB<->SATA or USB<->NVMe bridge to take advantage of the external drive (speed isn't important at this stage).
I imagine a good USB host to connect to the FPGA would be the MAX3421E (are there alternatives?), which can be controlled via SPI.
But now I'm wondering, once the MAX3421 is connected to the SPI bus, how can I control it from the FPGA? If I want to write/read RAW data from the USB Mass Storage device (without considering any file systems), how complex is it to build a system on the FPGA (VHDL/Verilog) that can do this?
I don't think it's enough to just tell the SPI bus "read a byte at sector/address" or "write this byte to sector/address."
Are there any pre-built IPs that can help me?
Do you have any general suggestions?

 

The Arduino or other is the master and FPGA the slave.
The FPGA has some programming to match the SPI from the master.
You are sending data over USB 2.0 via SPI
Since this has a learning curve one way to approach this is to build your familiarity.
An FPGA basic serial connection can be made with Verilog and a few others.
Starting with UART can help to really understand the interface then add detail with SPI
Usually after gaining enough familiarity, that allows you to discover more about what happens.

Some boards, like the Arduino MKR Vidor 4000, feature both a microcontroller and an FPGA on the same board.
For these boards, the manufacturer provides board packages and libraries for the Arduino IDE that handle the complexities of communication between the MCU and the FPGA. Arduino IDE can upload both the C++ sketch and the FPGA bitstream together.

 

I've already implemented FSMs for EEPROM and SD Cards with SPI.
BUT my problem now is figuring out how to handle a mass storage device.

Some boards, like the Arduino MKR Vidor 4000, feature both a microcontroller and an FPGA on the same board.
For these boards, the manufacturer provides board packages and libraries for the Arduino IDE that handle the complexities of communication between the MCU and the FPGA. Arduino IDE can upload both the C++ sketch and the FPGA bitstream together.

Unfortunately I have to do everything at a low level, directly with FSM implemented with VHDL and Verilog...

 

For PCIe/SATA or any other high speed Gbps interface you need what is called in AMD/Xilinx devices a Multi-Gigabit Transceiver (MGT) which are essentially a SerDes with inner Clock Data Recovery for 8b10b/64b66b/128b130b with comma detect etc, modulation/demodulation and a large etc.
Some Efinix FPGAs should have these SerDes, don't know about their performance and characteristics.

If the device you are using does not, and if you want to store your data into an SSD, you need a SATA HW interface like the above mentioned to handle serial Gbps data flow plus SW drivers. No way other than a USB to SATA converter. In both cases you need a SW/FW driver (also for your MAX3421) .

Unfortunately I have to do everything at a low level, directly with FSM implemented with VHDL and Verilog...

Unfortunately? It is pretty funny! I cand do it for you but not for free.

 

If the device you are using does not, and if you want to store your data into an SSD, you need a SATA HW interface like the above mentioned to handle serial Gbps data flow plus SW drivers. No way other than a USB to SATA converter. In both cases you need a SW/FW driver (also for your MAX3421) .

That's what I asked in the initial post.
But I think I've found something better (that even supports the FAT file system): VNC2 - 48Q1C

 

as mentioned above by others,
many modern FPGAs have very high speed serial links, 50 Gb/s is common,
and all the associated components to convert between serial and parallel

regarding connecting to NVMe drives
the newer / faster ones , are PCIe ,

again many modern FPGA have built in PCIe cores that might make the interface easier ,
but you are going to have to ensure that the FPGA PCIe interface can act as a PCIe master , not all can.

also note, NVMe is not FAT,

also look here
https://www.digikey.co.uk/en/products/detail/opsero/OP063/16798386