@WBahn

I don't have a problem with making the assumption that VBE = 0.7V. This comes from the diode equation.

How did you arrive that VCE(sat) = 0.3V?

What diode equation? The exponential one? Show how a fixed value of Vbe = 0.7 V comes from that.

As for Vce(sat) being 0.3 V, like the diode equation it is an approximate model that holds reasonable well for a wide range of small-signal silicon BJT transistors over a wide range of useful operating points. Common values are 0.2 V, 0.25 V, and 0.3 V. Just as common assumptions for Vd or Vbe are 0.6 V, 0.65 V, or 0.7 V. In this case I chose 0.3 V because the device datasheet (posted earlier in the thread) shows that the max saturation voltage at a collector current of 50 mA (and a beta of 10) is 0.3 V. This transistor is being operated reasonably near that current level and so justifies that choice.

 

What diode equation? The exponential one? Show how a fixed value of Vbe = 0.7 V comes from that.

As for Vce(sat) being 0.3 V, like the diode equation it is an approximate model that holds reasonable well for a wide range of small-signal silicon BJT transistors over a wide range of useful operating points. Common values are 0.2 V, 0.25 V, and 0.3 V. Just as common assumptions for Vd or Vbe are 0.6 V, 0.65 V, or 0.7 V. In this case I chose 0.3 V because the device datasheet (posted earlier in the thread) shows that the max saturation voltage at a collector current of 50 mA (and a beta of 10) is 0.3 V. This transistor is being operated reasonably near that current level and so justifies that choice.

How does one determine VCE from theoretical data? I don't know how to do that.

To find out experimentally, I set up a 2N3904 transistor with emitter to ground.

Vcc = 10V
IB = 500μA
RL = 180Ω

Measured VCE = 1.0V

 

Next, I went to a simulator, Circuit Maker 2000, with the same parameters as above.

Simulated VCE = 2.25V

 

How does one determine VCE from theoretical data? I don't know how to do that.

Simple -- by using mathematical models appropriate to the theoretical data. The quality of the results depends on the quality of the model. If the results aren't good enough for a particular purpose, then the model isn't good enough for that purpose and a better model should be used.

To find out experimentally, I set up a 2N3904 transistor with emitter to ground.

Vcc = 10V
IB = 500μA
RL = 180Ω

Measured VCE = 1.0V

Not surprising at all and well within spec. At Vce = 1.0 V and Ic = 50 mA, the data sheet only says that the beta will be at least 60. You are seeing 100. But that provides NO evidence that beta isn't constant right up to the point of saturation (even though, of course, we know it isn't), particularly not based on any comparison to the value of 150 given in the problem statement. In fact, the problem clearly states that that value applies to that particular transistor (without stating what conditions it is based on). At 10 mA and a Vce of 1.0 V, the bounds are a min of 100 and a max of 300 (the only point at which min/max are given, and so the most reasonable choice for the nominal operating point at which the 150 was measured (supposedly -- since it almost certainly was never measured at all and just stated for the purpose of the problem) for the problem transistor). So it could just be that your transistor just happens to have a different beta at the same point. It would be interesting to know what your measured beta is at Vcc = 15 V.

 

At VCC = 15V
VCE = 2.45V

Thus β has climbed from about 100 to 140.

 

Next, I went to a simulator, Circuit Maker 2000, with the same parameters as above.

Simulated VCE = 2.25V

So that transistor would appear to have a beta of 86 at a collector current of 43 mA. Well within spec.

Since the physical transistors are allowed and expected to exhibit a wide range of parameters in the real world, it is really surprising the simulators do as well.

That just underscores the need to not use designs on which the actual value of beta matters. In this circuit, it matters a LOT! So, all we have really learned is that a simple CE amplifier like this is a poor choice if we care about the actual voltage at the collector in response to a given base current.

 

I believe it also emphasizes an important rule-of-thumb.

You can design a CE circuit to operate in the linear region.

If you wish to ensure that the transistor is driven into saturation, use β = 10.

 

At VCC = 15V
VCE = 2.45V

Thus β has climbed from about 100 to 140.

So that would indicate a couple of things -- First, the problem statement of 150 was quite reasonable for the purposes of the problem.

Second, we now have some evidence of how much beta can drop (33% in this case) as Vce moves toward saturation and as collector current increases. Since both things are happening (between these two data points) we don't know which effect is dominant. What would be telling (and I'm not asking you to do this, just saying that it would be an interesting and, I think, useful exercise for a student in order to get a feel for this) is to plot the beta value for a particular transistor as a function of collector current at a fixed Vce and also as a function of Vce at a fixed collector current. The obvious next step would be to figure out a way to capture the results in a single plot and then how to modify that plot to capture the variability of beta over a sampling of transistors of a given device number.

What I picture is a plot of Vce vs Ic (or the reverse) with lines for constant beta. As you overlay plots from different devices (or perhaps the same device at different temperatures) you could expand each line into a shaded region based on min/max or perhaps standard deviation.

 

I believe it also emphasizes an important rule-of-thumb.

You can design a CE circuit to operate in the linear region.

If you wish to ensure that the transistor is driven into saturation, use β = 10.

But the reverse is not true. Don't assume that it is in the linear region just because the beta is greater than 10. You get into serious nonlinear behavior long before you reach hard saturation.

 

But the reverse is not true. Don't assume that it is in the linear region just because the beta is greater than 10. You get into serious nonlinear behavior long before you reach hard saturation.

Yes, I am well aware of that.
Hence I wondered before when do we make the distinction between hard clipping and saturation?

That is why the original question as stated is questionable.

 

For me right now, I think I am fully saturated.
I am going leave this for now and go hammer some nails. The XYL wants a new floor.

 

Yes, I am well aware of that.
Hence I wondered before when do we make the distinction between hard clipping and saturation?

That is why the original question as stated is questionable.

I'm pretty sure the original question is targets at an audience that is just barely getting introduced to transistors. For that level audience, I don't think it is that questionable at all. Just like introductory physics questions that ignore friction are not questionable, they are simply targeted at an audience that is not yet at the point of dealing with friction. So we can agree to disagree on that.

 

How did you determine VCE?

Hi,

Vce is determined by multiplying the collector current time the collector resistor to get the drop across that resistor, then subtracting the power supply voltage minus that voltage drop, again assuming a CE circuit because that is most likely. So we have:
Vce=Vcc-vRC

and since vRC=ib*Beta*Rc we end up with:
Vce=ib*Beta*Rc

We start out KNOWING that the transistor is in saturation, and one problem that comes up here is if we select a value for Vce sat that is too low we end up needing a high value for Beta, so i went with what i think would be reasonable but still high enough to support the idea that it is in saturation, so i chose 1v as a starting point. This is not that bad but if you prefer 0.5v then the Beta for sat then becomes around 106 instead of 100 like i used, so we get similar results. I thought that was a little high but that's life.

In reality we have to know the base voltage as well as the other things in order to determine if the thing is in saturation, but we are trying to keep this simple i guess.

 

I revisited the problem and created this graph ....


I held Vce at 0.3 V until the transistor came out of saturation. Otherwise, the graph could have looked like this, the blue line was the calculated value :

 

Here is a beta graph.

I have nine models for the 2n3904. The one in this graph labeled 150b is an ideal model with a beta of 150. The others break out into two different groupings that are similar from an analysis view. Also included is the exported text file, tab delimited, showing the Vcc, then the Vce for each individual model.

The top five models showed a beta of 100 ... the next four showed about 50 to 58, and of course, the 150b model was 150.

All circuits had a constant current Ib of 500 uA. All simulations done in TINA.



The new-paper model was a paper I found on the web where a student wrote about an improved 2N3904 model. All these models were retrieved about a decade and one half ago.

 

I emailed the lecturer and his response:
I don't see anything wrong with the question.

Although the circuit is not given, the values of IB is given the value of RC is given the initial value of VCC is given. You don't need the values of ICsat. you need to calculate it using the fact that when the device is saturated VCE is approx. 0V or 0.2V which is in the textbook.
Then you can get the ICsat and you can get the actual value of IC and compare to prove that the device is saturated.
Then you now use the actual value of IC against the new value of VCC and get the new value of VCE to see if the device is saturated or not.
There is nothing wrong with the question, some questions do not come with circuits this is done to make you think and analyze.
regards

 

I emailed the lecturer and his response:
I don't see anything wrong with the question.

As alluded to earlier, you must be taking entry level class where some BJT attributes are being ignored.

Just use beta=150 and you'll get the expected answers.

In the real world, no designer would design a circuit that's unnecessarily dependent on beta.

 

I emailed the lecturer and his response:
I don't see anything wrong with the question.

Although the circuit is not given, the values of IB is given the value of RC is given the initial value of VCC is given. You don't need the values of ICsat. you need to calculate it using the fact that when the device is saturated VCE is approx. 0V or 0.2V which is in the textbook.
Then you can get the ICsat and you can get the actual value of IC and compare to prove that the device is saturated.
Then you now use the actual value of IC against the new value of VCC and get the new value of VCE to see if the device is saturated or not.
There is nothing wrong with the question, some questions do not come with circuits this is done to make you think and analyze.
regards

I alluded to this in post #13 but got no response.
What is the max Ic at Vcc = 10V?
What is the max Ic at Vcc = 15V?
Given Ic = β x IB
What can we say about the saturation/non-saturation state of the common emitter circuit?
End of Question

Since then it has intrigued me as to how can we calculate VCE and at what supply voltage Vcc can we say the transistor is just borderline in-out of saturation?

 

Here is a 180Ω load line superimposed on a real 2N3904 I-V characteristic curves.





For this device, β = 200 @ IC = 20mA, drops to about 150 @ IC = 60mA

The red line is with VCC = 10V. At IB = 500μA, VCE = 1V

Green line is with VCC = 15V. At IB = 500μA, VCE = 3.5V

Which is in saturation and which is not in saturation?

 

Here is a 180Ω load line superimposed on a real 2N3904 I-V characteristic curves.


View attachment 120040


For this device, β = 200 @ IC = 20mA, drops to about 150 @ IC = 60mA

The red line is with VCC = 10V. At IB = 500μA, VCE = 1V

Green line is with VCC = 15V. At IB = 500μA, VCE = 3.5V

Which is in saturation and which is not in saturation?

Hi,

To be sure, we'd have to see the same type of drawing for the base emitter voltage. I'd also have to ask where that drawing came from.

But just to estimate for now, it looks like 1v is not in saturation either, and at 500ua base current i seriously doubt that it is (assuming your drawing is correct of course, and the same one used by the instructor).
If we assume that the voltage is 1v then we have a Beta of 100 to start with, and with the same base current of only 500ua it would be hard to believe that with 15v and Beta of 150 and Vce of 1.5v that it could still be in saturation.

So according to that drawing it is probably not in saturation at 10v, but that must not be the same one the instructor used. When they ask questions like this they should provide all the details or at least links to the data sheet they used otherwise it is impossible to be sure. Perhaps the instructor has little real world work experience

Most of the people here have BOTH theory and application under their belt so i would believe them first, but in order to pass the course you have to get more info from the instructor anyway sometimes because they have very firm beliefs that dont change unless you bend them over and smear their face in it

Another small point worth mentioning is that it is easier to tell when something is not right than to get it right in the first place. That tells me that if a lot of people with experience are saying that something is not right, then it is probably true that it is not right. Here i think we are just lacking information to be 100 percent sure.
This kind of thing happens more often than we might think because i think the instructor has a clear view of what he is talking about and asking in his own head, but fails to get the necessary details down on paper.

If we can find two reputable data sheets that gives us a different result for this problem then we proved that there is not enough information.

[LATER]
A spice simulation of this circuit shows that the transistor is almost certainly in saturation with 10v and 500ua, where the base emitter voltage is over 800mv and the Vce is very close to 400mv. I would have absolutely no problem believing that it is in saturation even without doing any calculations.
Also, when Vcc is increased to 15v, the Vce rises to about 4.7v which is clearly NOT in saturation.
This tells me that the instructor is using a different model than your drawing shows, and that using the model i am using, we get pretty clear results for 10v and 15v, where with 10v it is saturated and with 15v it is not saturated.
I might note however that sometimes spice overestimates the Beta constant for these models.

If we go back to basics and just take the question statement about "being in saturation" as being absolutely true, then we have to come up with the same conclusion because with Vce=1.5v i dont think there is any way we can call it saturated with only 500ua base current, and taking the problem statement as true for the starting condition, that tells us the same thing: that it comes out of sat at or before 15v. With the spice model i am getting a value of about 10.4v when it looks like it comes out of sat.