I breadboarded this circuit and I'm seeing the same problem with resetting on 4.

LS293 is the same as LS93 with power and ground at pins 14 and 7, respectively.

I have to work through the output transitions to see if spikes are being generated. When I did that before, I thought it would be okay. Glitches caused by outputs of asynchronous counters switching at different times are why circuits that decode the outputs use synchronous counters. The circuit behaved the same without and with pull-up resistors on the inputs of the AND gates.

Do you have a synchronous counter you can try?

I'm expecting company and won't be on AAC for a few days.

 

What I dont understand is why it didnt work with previous circuit but only with this one?
previous circuit (that worked fine in simulator but in reality was counting only to 4 and reseting.
Try to explain to me.
Thank you.

Hi,
I've figured out why the original circuit resets at a count of 4. The problem is the propagation delay in the 4081 AND gate. The output of the gate is probably still high when the C output of the 74LS93 goes high, giving a false signal on the other RS input.
It wouldn't happen if a 3 input AND gate had been used. It's effectively what the NAND gate cct is. A 74LS08 AND gate MAY be fast enough to get away with it, but I ran out of time to either try it, or scope the above.

Edit:
Just tested. The easiest fix for the problem is to move the wire link from 74LS93 pin QC to QA and the existing link to QC, at which point the delay in the AND gate no longer becomes a problem. Also, either remove the second AND gate driving the D type and drive straight from the output of the first one, or do as I did and just move one link and use it as a buffer!

 

Hi
I've figured out why the original circuit resets at a count of 4. The problem is the propagation delay in the 4081 AND gate. The output of the gate is probably still high when the C output of the 74LS93 goes high, giving a false signal on the other RS input.

Hi,
So you are confirming my suspicion from #55 :"...In my mind, some gate is moving faster than others and they dont arrive at the same time on the same pin. You get me? So thats my thought..." Thats interesting... I mean it apeears you guys dont see other logical explanation as I didnt as well. Thank you for this confirmation !
And indeed, I failed to mention all the details of every permutation I did there, since they were thousands probably, at count 3, (when both leds are ON) both pins are high and I actually measure it , I know is stupid but I did it anyway, and when I switched, I could see the transition from high to low on my DMM, and it did switched but that episode, seeing it switching, contribute to my later conclusion that "may be a time delay" between gates, I believe asynchronously is the proper term for it. Thats why I said it might be repairable with a capacitor to balance that suspected delay.... but I imagine it will be a time diference of even 1ns and that is out of (my) game to try. Haha.
-Miss @sarahMCML , can you draw me a circuit with your result that you explained in words ? not everything is clear what to do for me. I understood something but not everything. Also MCML = Roman Numerals = 1950. I recognize Roman numerals from a mile away. Very clever ! I imagine that is your birthday? So you are now 73, right?

To mister @dl324. Do your thing, dont worry about me. And good luck with what you have to do there. I have to continue this thing to push it to drive that led matrix.
I am very impressed !!! that you actually try the circuit and you get the same result as me !!! Formidable - really. I didnt expect it. So you see, I didnt lie. I did come over hard problem to resolve as I entered into this project. Thanks to YOU, that you figure out that J and K to be put on High, and funny thing, AFTER I actully mounted the link wires, then a flash of memory come into my eyes, and I said, "I recognise this patters of wires", so I definitely did this before but was completely blank when I did it these days until your correction.

 

I breadboarded this circuit and I'm seeing the same problem with resetting on 4.
View attachment 276795
LS293 is the same as LS93 with power and ground at pins 14 and 7, respectively.

I have to work through the output transitions to see if spikes are being generated. When I did that before, I thought it would be okay. Glitches caused by outputs of asynchronous counters switching at different times are why circuits that decode the outputs use synchronous counters. The circuit behaved the same without and with pull-up resistors on the inputs of the AND gates.

Do you have a synchronous counter you can try?

I'm expecting company and won't be on AAC for a few days.

The pin 12, 13 of LS293 connecting 1K resistors to +Vcc.

 

AT28C16 EEPROM p5 - First columns programmed

1min movie - hard core I tell you !

Ive edited this matrix diagram for manual programming and correct wiring (for later use of for who will need it) - also ready for print.

 

Another victory:

 

Miss @sarahMCML , can you draw me a circuit with your result that you explained in words ? not everything is clear what to do for me. I understood something but not everything. Also MCML = Roman Numerals = 1950. I recognize Roman numerals from a mile away. Very clever ! I imagine that is your birthday? So you are now 73, right?

I don't seem to be able to find a suitable drawing program to do a diagram, so I'll try to write it simply:
1) Take the end of the lead connected to 74LS93 QC, pin 8, and connect it instead to 74LS93 QA, pin12.
2) Take the lead that you removed from 74LS93 QA, pin 12, and connect it back to 74LS93 QC, pin 8, so swapping the two leads.
3) Move the lead connecting one input of NAND gate U33 from 74LS93 R0(2), and reconnect it to R0(1), so that they are both together.

I've attached two files. the first is with the 4081, and shows the yellow pulse, which is the AND output going low long after (about 50ns) the QC output pulsing high, thereby allowing two reset inputs and false reset at the 4 count.

The second image is with a 74LS08 AND gate, and shows the AND output going low right in the middle of the QC pulse going high, at the 7 count.

 

This is the circuit that worked fine in proteus simulator, but didnt worked in reality, (for reference):
And about this was the entire discussion. Why it didnt work in reality? And I said and you said as well, that it may be some time diferences in the signal propagation. Right?


@sarahMCML thank you for testing this on your osciloscope for me. Very nice osciloscope ! I like that it has 4 probes!!! Very cool.
I folowed your instructions but I get NO results whatsoever.
Im trying my best to do exactly what you say here.

I don't seem to be able to find a suitable drawing program to do a diagram,

This is simply mean and childish... You can draw on a piece of paper and make a picture of it. Come on. Hahahaha.

Here, I did exactly what you told me: (the results are chaotic)
Explanation #1:

Explanation #2:

 

All the output of TTL ic when they connect to the CMOS ic then you should add a 1K pull-up resistor to +vcc for each pin.

 

This is the circuit that worked fine in proteus simulator, but didnt worked in reality, (for reference):
And about this was the entire discussion. Why it didnt work in reality? And I said and you said as well, that it may be some time diferences in the signal propagation. Right?
View attachment 276890

@sarahMCML thank you for testing this on your osciloscope for me. Very nice osciloscope ! I like that it has 4 probes!!! Very cool.
I folowed your instructions but I get NO results whatsoever.
Im trying my best to do exactly what you say here.


This is simply mean and childish... You can draw on a piece of paper and make a picture of it. Come on. Hahahaha.

Here, I did exactly what you told me: (the results are chaotic)
Explanation #1:
View attachment 276888
Explanation #2:
View attachment 276889

I was tired when I wrote the above (I'd been awake for 18 hours!) and realise that I should have said:
1) "Take the end of the lead connected to 74LS93 R0(2), pin 3, remove it from QC, and connect it instead to 74LS93 QA, Pin 12.
2) "Take the AND gate lead that you removed from 74LS93 QA, Pin 12, and connect it back to 74LS93 QC, pin 8, so swaping the two leads.

I attach the basics of the DRAWN cct here.

 

Excellent - now I like you more. I know it cost you an arm and a leg for this drawing but is worth it ! Is for a greater cause !
What osciloscope mark you have there with 4ch?

 

And I made the first letter ! I am so happy !
Thats it - project over ! haha
I am so happy and amazed that I did it.

 

The proof here:

 

Excellent - now I like you more. I know it cost you an arm and a leg for this drawing but is worth it ! Is for a greater cause !
What osciloscope mark you have there with 4ch?

You may be interested in a screen shot I did using an oscillator made from a 74LS14 driving the cct.
the top trace is the clock.

The next one down shows the output of the AND gate, which goes +ve at a count of 6, ie when both QB and QC go High. The -ve edge of the next clock pulse clears it and resets the 74LS93 when QA goes high.

The bottom trace shows QC going high at the count of 4, and resetting on the 7 count.

As you can see, it's a Siglent SDS2104 Plus scope, with all the upgrades. I also have a Rigol 1054Z which I purchased several years ago. You're going to hate me for this, but I have a collection of older CRT scopes as well, almost all of which work.

 

using an oscillator made from a 74LS14 driving the cct.

You mean 74LS93
---
Thank you for showing me this. Its very interesting to see all the switching ! And all of them in one shot on one screen!
- I have "friends" (not many) that they say 4ch osciloscopes are not important and I can do the same job with a 1ch osciloscope. When and if I will be able to aquire one.
What is your opinion- actually your experience- using this one with 4channels ? Im very curious how much did you used its 4ch and in what contexts. This project right here proves me how important is to have multiple scopes readings in the same time.
I have a bullc**p of osc called DSO138, that is good in a sense but I wish something better, ofcourse when I will have money for one. In 40 or 60 years from now, haha.

 

T

You mean 74LS93
---
Thank you for showing me this. Its very interesting to see all the switching ! And all of them in one shot on one screen!
- I have "friends" (not many) that they say 4ch osciloscopes are not important and I can do the same job with a 1ch osciloscope. When and if I will be able to aquire one.
What is your opinion- actually your experience- using this one with 4channels ? Im very curious how much did you used its 4ch and in what contexts. This project right here proves me how important is to have multiple scopes readings in the same time.
I have a bullc**p of osc called DSO138, that is good in a sense but I wish something better, ofcourse when I will have money for one. In 40 or 60 years from now, haha.

No, not the 74LS93 counter, a separate oscillator made from one gate of a 74LS14 Schmitt Trigger NAND IC, 1 10K resistor, and a 4.7 ufd capacitor, connected into CKA , pin 14 of the 74LS93. Look it up, it's very simple and useful when you need a quick square wave signal for something.

As for having 4 channels on a scope, you find you use them if you have them! All my working life I got along with just 2 channel scopes, and the best I ever had was rated at 60 MHz. Now I have 4 that will do at least 300 MHz or more, and 4 channels.

Back when I built and designed my own computer boards in the late 70's onwards, I only had a 2 channel, 20 MHz scope, but managed. Things were slower then!

 

As for having 4 channels on a scope, you find you use them if you have them!

Extremly informative and I totally get it ! Thank you !

Back when I built and designed my own computer boards in the late 70's onwards, I only had a 2 channel, 20 MHz scope, but managed.

This information (for me), is pure gold. Excelent - I love to read from other people experiences. I learn a lot. Thank you !

 

Mister @Jony130 give me this circuit to try. It worked perfectly in simulator. It worked in the reality as well but only 50%.
See why is not clocking the 4027. Or inverse, why the 4027 is not receiving the signal? too fast? too slow? any signal at all? im always thinking the breadboard im working is somehow influencing the results, its my paranoia I have to deal with. The large majority 95% of circuits made on breadboard worked, and they were very sensitive and complicated (as this project I just made).
To miss @sarahMCML I ask you to make this circuit on your breadboard and scope it for me :

ohh, for that blue LogicToggle which represent a button, I used this:
Pin3 output of the 555 (100ms signal), goes to pin 14 of the 7493 (where the blue LogicToggle is)

- Thank you !

 

Mister @Jony130 give me this circuit to try. It worked perfectly in simulator. It worked in the reality as well but only 50%.
See why is not clocking the 4027. Or inverse, why the 4027 is not receiving the signal? too fast? too slow? any signal at all? im always thinking the breadboard im working is somehow influencing the results, its my paranoia I have to deal with. The large majority 95% of circuits made on breadboard worked, and they were very sensitive and complicated (as this project I just made).
To miss @sarahMCML I ask you to make this circuit on your breadboard and scope it for me :
View attachment 276977
ohh, for that blue LogicToggle which represent a button, I used this:
Pin3 output of the 555 (100ms signal), goes to pin 14 of the 7493 (where the blue LogicToggle is)
View attachment 276978
- Thank you !

The clock input of the 4027 is floating, when QA,QB,QC are high.
Connect a pull-up resistor ( for example 4k7) to the clock input.

 

The clock input of the 4027 is floating, when QA,QB,QC are high.
Connect a pull-up resistor ( for example 4k7) to the clock input.

Thank you ! Wow, I didnt see it at all.