I moved everything on my usual testing breadboard but the result is the same.
At least I eliminated another variable : "the breadboard".
Mod:lightened your image.E


Note: ALL the yellow wires here on this board, are (-) and all the green links are (+), to one side or the other side, doesnt matter. Now you can understand my logic why I prefer (+) on exterior and (-) on interior.

 

Ive noticed the HIGH voltage is 3.5V when the power supply is at 5V.
I push up to 6V the power and the HIGH become 4.5V, very close to 5V.
But still no effect. I reverted to 5V as it was.

 

I told you, this 7493 counter needs something 'special' on its R01. As you remember from my previeous videos, if I give it a direct metal wire link to other pins, it is working without any issues. Im thinking maybe the voltage is too low, being absorbed by the AND gate and not enough to drive the pin of the counter....Im thinking a transistor to buffer up the voltage
mm
mm - (why I cant I put the images on the same line? Its more elegant.)

So instead of that direct wire from the AND gate, to put a transistor there.... Thats my desperate idea.

 

adding a transistor to the AND Gate
-now counting to 4 and resetting - like the first 4081

 

I put the osciloscope on the 7493
R02 does not get high at all. Only R01 and CKB.
What is the role or what is the mechanism of R01 and R02?

 

I push up to 6V the power and the HIGH become 4.5V, very close to 5V.

Don't do this. TTL is specified to operate at 4.75-5.25V. Exceeding that can damage the device.

Ive noticed the HIGH voltage is 3.5V when the power supply is at 5V.

This is within the specs:



Other TTL inputs will be happy with 3.5V:

 

What is the role or what is the mechanism of R01 and R02?

Both reset inputs need to be HIGH to reset the counter.

Which device are you using? 7493 or 74LS93? They're not always interchangeable.

I've been giving data for 74LS93.

If you're going to be using this counter to drive the rows, why don't you use CD4017? It will do the decoding of 0-7 for you. That's why I used it for driving columns in your other thread.

 

First of all thank you for all your explanations. Im learning slowly but surely.

Which device are you using? 7493 or 74LS93? They're not always interchangeable.

My friend mister marconi from another forum, get me used to say the shortcut name instead of the full name. And is indeed easier to write and to spell. So im kind of adapted to the new mentality of shortcut names for all the logic gates. At least the ones that Im working with on the current project. Indeed I am using 74LS93 IC but I shortcut it to 7493 in my spelling.

If you're going to be using this counter to drive the rows, why don't you use CD4017? It will do the decoding of 0-7 for you. That's why I used it for driving columns in your other thread.

I know and I love some parts of your counter project !!! Truly. I hope I will be good enough to adapt them into my project. The thing is... I am NOT good with logic gates or digital circuits like these. This is my first serious logic circuit. So I started to follow my UK friend circuit from the beginning. After we finish it, if Im good enough, or also with your help as well, we will adapt some of that very cool functionality you had in your project to this finished one. But not before because I have to concentrate on this line for the momment. Your 2 main --cool-- things you had in your counter was the scrolling vertically display, and the reset button. Very cool indeed. I love them. But not ready for them yet. But I promise I will.
Also the SRAM memory project I had to put it on hold also, until this one will be finished.
Thank you !

 

Also... the count to 7 is resolved now ! Not by me, but by mister marconi , my UK friend from the other forum. He was mind blowing how he linked everything there. What a mind.... truly wonderful work. At least I am extremly impressed since I had absolutely no idea how to continue or make it work.
Here it is:

 

My friend mister marconi from another forum, get me used to say the shortcut name instead of the full name.

I saw 74LS93 and 7493, but my recollection was that you were using LS93.

I am using 74LS93 IC but I shortcut it to 7493 in my spelling

It's better to say LS93 because 7493 is a different component. I think I recall seeing 'LS93 and '93 used for 74LS93 and 7493, respectively.

At least I am extremly impressed since I had absolutely no idea how to continue or make it work.

There's nothing tricky or clever going on. The NANDs wired as inverters turn the NANDs driving them into ANDs.

What you had before was equivalent (except that you might have had a problem with mixing CMOS with TTL).

 

You got the hang of screencapturing - GOOD !
But you can ask me for any circuit I had made. Or to be made.
This is the actual circuit that worked in reality, and made by the greatest mister marconi. Very good with logic gates. He solved the puzzle. I couldn't think of such contraption. Really.

What I dont understand is why it didnt work with previous circuit but only with this one?
previous circuit (that worked fine in simulator but in reality was counting only to 4 and reseting /or/ skipping 7 and counting up from 8. Clearly, only 7 was not doing it.

Try to explain to me.
Thank you.

 

Try to explain to me.

It should work. When the count gets to 7, the counter should get reset.

Was this the circuit that was resetting at 4?

What D flip flop are you using? I need to look up the clock pulse width requirement. A simulation won't necessarily give you realistic behavior.

 

You got the hang of screencapturing - GOOD !
But you can ask me for any circuit I had made. Or to be made.
This is the actual circuit that worked in reality, and made by the greatest mister marconi. Very good with logic gates. He solved the puzzle. I couldn't think of such contraption. Really.
View attachment 276707
What I dont understand is why it didnt work with previous circuit but only with this one?
previous circuit (that worked fine in simulator but in reality was counting only to 4 and reseting /or/ skipping 7 and counting up from 8. Clearly, only 7 was not doing it.
View attachment 276708
Try to explain to me.
Thank you.

Try this version as well

 

Try this version as well

Duuude, that is awesome ! In the simulator is working fine. But not in reality! Which sucks.

 

To mister @Jony130
It needs something "special" that Proteus assumes you have to know already and apply it in reality. Proteus is giving us the IDEAL result. In reality we have leaks, sparks, delays, etc.
My assumption, is that we have to put a 'delay' somewhere ---I dont know were exactly--- in form of a capacitor. Somewhere. I mean in reality to match the simulator. I believe, these IC's are moving so fast, they need some delay at some point... to equalize/ to balance the circuit. In my mind, some gate is moving faster than others and they dont arrive at the same time on the same pin. You get me? So thats my thought. Better than this... nothing.
Thats why in reality doesnt work but in simulator is working. This is my explanation on the difference between these 2 environments.
From now on I will advance to the rest of the circuit of this memory from Atmel. If you happen to find the incompatibility between reality and the simulator, please announce me. But dont stress too much over it. We tried !!!
Also, I was sincerely imagined I will start and finish this project faster and I will get back to that SRAM very quickly. But reality beat me at my naked ass for my arrogance. How could I think this will be quick? What impertinence from my part. Right? But we will get to that. Just stick with me and help me along the road to finish this quickly.
---
To my friend mister @dl324

It should work. When the count gets to 7, the counter should get reset.
Was this the circuit that was resetting at 4?

Yes ! This was resetting to 4 in reality while in simulator worked excelent.

I stay and think for awhile and my idea why is not working in reality, is because, like I explained to mister Jony130, "...we have to put a 'delay' somewhere ---I dont know were exactly--- in form of a capacitor... ...these IC's are moving so fast, they need some delay at some point... to equalize/ to balance the circuit. In my mind, some gate is moving faster than others and they dont arrive at the same time on the same pin."
Thank you for sticking with me.

What D flip flop are you using? I need to look up the clock pulse width requirement. A simulation won't necessarily give you realistic behavior.

I already presented and explained about the FF. It was the first thing that I had to resolve. Come on. I am using a D-FF in simulator but in reality I am using JK-FF. Its mark is 4027. I had to use a special circuit for it to work, and not the one in the simulation. I never had any problems with it since.
Pin 3 on the chip is the SIG (signal), which equivalates the CLK to the output of that NAND gate.

 

Duuude, that is awesome ! In the simulator is working fine. But not in reality! Which sucks.

Try to remove the LED's. Because now the current can flow for example in this way from Vcc ---> 10k pull-up resistor--->D1-----> QA LED ---> Resistor ---> GND.
On Monday I will try to test it myself if I manage to find 74LS93 at work. To be honest I never used 74 logic gates in my projects. Because I was taught to use CMOS logic only (CD4000 family).

 

I already presented and explained about the FF. It was the first thing that I had to resolve. Come on. I am using a D-FF in simulator but in reality I am using JK-FF. Its mark is 4027.

I generally ignore information presented in that format. Pin order "schematics" don't convey functionality and I find trying to read them, unless I have a good reason, to be a waste of time and effort.

If you want it to work reliably, you need to tie the J and K inputs HIGH.

Why didn't you put the JK flip flop in your schematic and show how you connected it to make a toggle flip flop? That would waste less time trying to explain that "this is my schematic, except I'm actually using a JK FF instead of a D FF", ...

Is the flip flop toggling on your breadboard? The minimum clock pulse width for CD4027 is on the order of 330-500ns and you're going to get something closer to 50ns.
EDIT: on second thought, the delay in the CD4081 will make it iffy.

RCA:


TI:

 

Here's a synchronous mod 7 counter.

EDIT: corrected typo on one of the OR gates.

 

Why didn't you put the JK flip flop in your schematic and show how you connected it to make a toggle flip flop?

Because this circuit was extremely problematic to build in reality (compared to the simulator). And because I had to try a lot of permutations. I couldnt possibly make a new circuit for each permutation. But now, finally it is stabilized and Im starting to get some good results. So it is time to make an official circuit for it. You know Im always do it. But when is clear and certain it works.

and an error that I had to resolve, and now is fixed:

If you want it to work reliably, you need to tie the J and K inputs HIGH.

But then you told me this and I remember I did it another time exactly like this. But I remembered AFTER you told me.
So Ive updated both the circuit in the sim and in reality.
Working ok so far.
Thank you mister Denis !

 

So it is time to make an official circuit for it.

That circuit will have problems because the delays in TTL won't be long enough to clock the CD4027.

When you load outputs that drive other logic with LEDs, make sure you don't try to draw too much current.

My preference is to always draw the ground symbol pointing down. That makes it less likely to be confused with power. Can't do much about some symbols used for negative power supplies...