TTL is 74LS series. And CD4027 is a CMOS 4000 series.

 

Yes only on the right side I inverted the rails because is how I work

That makes it difficult for people who use the red and blue markings consistently. On unmarked boards, anything goes, but on color coded ones, it is better to be consistent. Especially if you're going to ask people to look at your breadboards.

On these breadboards, the manufacturer went so far as to label red '+' and blue '-'.

No. Which are the CMOS again? The 7000 series I presume?

CD4xxx, HEF4xxx MC14xxx, and similar are CMOS. 74HC*, 74HCT*, 74AC*, 74ACT* are also CMOS.

Watch out for parts from the likes of Samsung who label CMOS parts as 74HCTLS*. They are not LS TTL parts; they're 74HCT.

 

Thats how I marked the power lined only on the right side, for each of my breadboards.

I admit it is confusing for others when they look directly on the colored lines. I got used already by looking on the signs and make abstraction of the colors. I tried actually to take out that rail but is so well glued, that if Im dragging it out, it will brake the flimsy glued sponge that is on the back , which is holding in place the metal strips inside. So I decided not to risk it and I leave it alone as it is, and only changed the marking. I will think on another solution in the future, not to leave it like this being confusing. I know about this problem for a long time....

 

Thats how I marked the power lined only on the right side, for each of my breadboards.

The video where you showed how things were connected wasn't very helpful to me. It was bouncing around so much that I couldn't make out details. Well focused pictures showing connections are usually all that's necessary to follow wiring.

Regarding the colored stripes. You could try scraping them off, painting over them, or covering them with colored tape. I'm not sure if the boards would stand up to acetone and, hopefully, rubbing alcohol wouldn't remove them.

 

Do you have a bin file for the character generator you programmed in the EEPROM?

 

Do you have a bin file for the character generator you programmed in the EEPROM?

Good morning sunshines,
oh yes, everything I do is saved and put away for later use. My projects are made on stages or modules...usually. So one module will be used sooner or later. Now it remains a matter of finding it. I know that I am always uploading the last working version of everything I do, including this .bin file. I re-uploaded for you again.

 

So the big problem I am facing today is to make this 7493 IC count to 7....
In the proteus simulator, is working fine, but in reality, it stops to 4, doesnt matter the wiring I put on it !!!
I tried separately this circuit and now is counting up to 16, for 2IC's 7493 - the one I was using all the time and a brand new one.

So this is telling me the 7493 is a good chip, undamaged !!! GOOD !
Then, I switched to another NAND gate on the chip. Also I switched to another AND gate on the chip. You know, to try other gates from the 4 they have, in the idea maybe 1 gate is busted but the others are good.
I got the same result. It is counting and stops at 4.
It is counting to 3 actually (lit 2 leds), but when is trying to count to 4, is resetting. Like the wiring is connected for a 4 counts.... like this:

I became suspicious on my AND IC and I read carefully on it again, and it says CD4081BE. So it appears to be the right chip for an AND gate... But it behaves like a NOT gate...
It might be what you just said mister @dl324, being CMOS, easily damaged by ESD, either by me or from the guy I take it from, or board I scrap it.
---
I believe it is time to make a NEW and Glorious AND gate from discrete components. I only need 1 so its not a big deal.
I never built any logic gate before. This is my first time. And my first instinct is to make if from diodes. Like in this example:
I assume that RL is a 10k?

I am also thinking to test both IC's -theNAND and theAND- and see if they are doing what they should...before building a discrete gate.
And I just tested theAND gate. It does what it say it does. When A and B are to gnd, or one is on (+) and the other is on (-), the J output stays LOW. But when both A and B are to High, the output J gets High.
BUT... with an interesting side effect. When 1 or both A and B inputs are not connected to (+) or (-), when they are floating, the output J gets High....
Ta-ta-tam !!! This may be the reason mister @dl324 was saying these chips categories dont match eachother? the TTL and CMOS? May be.
One answer is certain. If one of the inputs (or both) gets in a tristate mode (not - not +) then it's output is High, and is certainly confusing/overriding the counter.

So, I solved this --floating problem-- by inserting 2x10k on each input pin (on A and B) and indeed solved it. I only had to put 1x10k on a single pin and the output wasnt High when floating. Also, it didnt affected the normal operation at all. Only when both A and B were High the output got High. The rest of the cases, is staying Low. Which is good.
I immediately inserted into my counter circuit. Absolutly no effect, it is still counting to 4. Incredible !!!
I also put 10k on the NAND inputs, and outputs, everywhere. No effect on the counting at all, still counting to 4. Again, incredible !
What a puzzle to descifre!

 

from another forum that Im discussing the same problem; demonstrating the counting to 7 works in proteus simulator.
https://electricians.s3.eu-west-1.a...68/68323-14c9881f6a55953bd09628c1274b5dd9.mp4

 

or.....maybe the counter 7493 is not liking theAND gate CD4081BE ? An incompatibility?
And somehow switching at #4 because some internal errors between these 2 IC's?
Yah... it might be it... its one plausible explanation.

 

aybe the counter 7493 is not liking theAND gate CD4081BE ? An incompatibility?
And somehow switching at #4 because some internal errors between these 2 IC's?

It could be the case. You can try to add 10k pull-up resistors at the 7493 outputs. Also, do not leave unconnected inputs of unused gates in IC. Connect all unused inputs to GND or VDD.

being CMOS, easily damaged by ESD

I personally never manage to damage the CMOS CD4000 family IC by an EDS (just by touching them with an "ungrounded hand").

 

It is that AND gate !

 

.bin file. I re-uploaded for you again.

How is the data arranged? How many characters are supposed to be in the file?

 

When 1 or both A and B inputs are not connected to (+) or (-), when they are floating, the output J gets High....

You shouldn't leave inputs floating on any logic devices. While you're breadboarding, it's okay to leave inputs floating on gates that you're not using as that only causes increased power dissipation in the IC. But you should tie them off to an appropriate logic level in the final circuit.

Don't take risks by handling CMOS devices improperly. Failure might not be immediate and impaired operation could give you some difficult to debug situations.

For many years, I just grounded myself before touching devices. Now I'm more likely to use antistatic tweezers and/or a grounding strap on my wrist. If I'm handling a lot of devices, I also use an antistatic mat.

 

A new AND Gate , a new breakthrough ! But still not good.
Now Im trully desperate. I have NO idea what to do next.
Please see this small video here and tell me what you think.

 

But still not good.
Now Im trully desperate. I have NO idea what to do next.

Have you tried putting 10k pull-ups on the inputs of the AND gate you're using? It defeats the purpose of having totem pole outputs, but it will pull up the outputs so they'll drive CMOS reliably; and they don't require much current anyway and you don't require much speed.

 

Have you tried putting 10k pull-ups on the inputs of the AND gate you're using? It defeats the purpose of having totem pole outputs, but it will pull up the outputs so they'll drive CMOS reliably; and they don't require much current anyway and you don't require much speed.

I tried with pullups, then with pulldowns but nothing to repair the error.
The voltage of the output of the AND when 93 is at 0b0000 (0decinal) is 0.025V = 25mV
The voltage of the output of the AND when 93 is at 0b0011 (3decinal) is 5V
so when is reaching 4decimal , is already High?

 

I tried with pullups, then with pulldowns but nothing to repair the error.
The voltage of the output of the AND when 93 is at 0b0000 (0decinal) is 0.025V = 25mV
The voltage of the output of the AND when 93 is at 0b0011 (3decinal) is 5V
so when is reaching 4decimal , is already High?

That's the way you designed the circuit.

The output of the and will be HIGH whenever the A and B outputs of the counter are HIGH (counts 3 and 7). When the count is 7, the AND gate will put a HIGH on one of the reset inputs and the C output will put a HIGH on the other. That will cause the counter to reset.

When the count reaches 4, the output of the AND will be LOW.

A convenient way to troubleshoot digital logic is to use a logic probe (like HP545A) or a clip on device that monitors the logic level of all pins simultaneously (like HP548A):

You won't be able to see the reset signal when the count reaches 7 unless you use something that can capture the brief pulse. The HP545A can do that, providing the pulse indicator was reset before the count reaches 7.

I don't know of any logic probes from other manufacturers that have the capabilities of the HP545A. That probe can differentiate between HIGH, LOW, and float and indicate pulse trains/single shot events.

The complete set includes an HP546A logic pulser and an HP547A current tracer:

 

But I dont get a reset on the 7th. I get a skip over and continuing counting after that. I mentioned this already.

 

But I dont get a reset on the 7th. I get a skip over and continuing counting after that. I mentioned this already.

When the count is 7, measure the voltage on the reset pin connected to the C output. If both reset pins are HIGH and the counter doesn't reset, it sounds like a defective counter chip to me.

 

AND Gate from 2 NAND Gates using a 7400 IC :
Very interesting results....