Hi, do FRAMs need their CE(bar) signal pulsed at every r/w access, unlike SRAMs?

Example: Infineon FM18W08 Parallel 5.0V which can replace the 62256 SRAM / 28c256 EEPROM.
What if If I do this: 8085 A15 to input to 1 of the 74HC04 inverters and to CE(bar) (pin 20) of FRAM 1. and output of the inverter of 74HC04 to
FRAM 2 CE(bar) (pin 20), It won't work right?

Thanks, -Kei

 

do FRAMs need their CE(bar) signal pulsed at every r/w access, unlike SRAMs?

Example: Infineon FM18W08 Parallel 5.0V which can replace the 62256 SRAM / 28c256 EEPROM.

According to the datasheet, CE# must be taken LOW for each read or write access:

 

Thanks, Dl, i will do that with the 74HC138.

Cheers, Kei