Hi, do FRAMs need their CE(bar) signal pulsed at every r/w access, unlike SRAMs?
Example: Infineon FM18W08 Parallel 5.0V which can replace the 62256 SRAM / 28c256 EEPROM.
What if If I do this: 8085 A15 to input to 1 of the 74HC04 inverters and to CE(bar) (pin 20) of FRAM 1. and output of the...
Hi, please check my pic below and comment on any potential issues that you find (assuming no I/O at this point). Some connections not shown for clarity:
Thanks, Kei
Hi, I think that this looks correct, please confirm. I am ONLY showing my connection to the 62256 32k x 8 ram CE pin that I added to the web page picture, slide 15: When A13,A14,A15 are all low, the 2764 should be selected. When A15 is high, the 62256 should be selected.
Keiichicom
I need to have a 2-digit down counter based on read-only memory RAM or ROM and to show the count on a 7-segment display, all done in Logisim or in another program.
Can someone help me thanks
I've been learning to program 32-bit ARM cortex-M controllers with an STM32 Nucleo (L476rg Nucleo). I've been playing with interfacing and controlling stepper motors so far. My next step is to move on to machine/computer vision and incorporate image sensing however upon some searching (hopefully...
A computer employs RAM chips of 1024 x 8 and ROM chips of 2048 x 4. The computer system needs 2K bytes of RAM, and 2K bytes of ROM and an interface unit with 256 registers each. A memory-mapped I/O configuration is used. The two higher -order bits of the address bus are assigned 00 for RAM, 01...