A computer employs RAM chips of 1024 x 8 and ROM chips of 2048 x 4. The computer system needs 2K bytes of RAM, and 2K bytes of ROM

Thread Starter

lucifer0858

Joined Sep 29, 2020
5
A computer employs RAM chips of 1024 x 8 and ROM chips of 2048 x 4. The computer system needs 2K bytes of RAM, and 2K bytes of ROM and an interface unit with 256 registers each. A memory-mapped I/O configuration is used. The two higher -order bits of the address bus are assigned 00 for RAM, 01 for ROM, and 10 for interface.
a)How many RAM and ROM chips are needed?
b)How many lines of the address bus must be used to access Computer system memory?
How many of these lines will be common to all chips?
c) How many lines must be decoded for chip select? Specify the size of the decoder
d) Draw a memory-address map for the system and Give the address range in hexadecimal
for RAM, ROM
 

Papabravo

Joined Feb 24, 2006
14,410
The solution is not unique. It only needs to prevent a location from being decoded twice. From a systems perspective you might want to provide for system expansion. That is the first location in ROM will not necessarily follow the last location in RAM. Fixing the memory map for the different sections to be contiguous would be like shooting yourself in the foot. I don't know if this is part of the problem, but how the processor comes out of RESET and where it starts executing instructions may figure into your considerations. The usual choices are some locations in low memory like 0x0000 or locations in high memory like 0xFFFF. Which mechanism is used implies where you want the ROM (Read Only Memory) to be located. The other idea involves being able to change the memory map after the processor completes is POWER ON initialization sequence.
 

Thread Starter

lucifer0858

Joined Sep 29, 2020
5
The solution is not unique. It only needs to prevent a location from being decoded twice. From a systems perspective you might want to provide for system expansion. That is the first location in ROM will not necessarily follow the last location in RAM. Fixing the memory map for the different sections to be contiguous would be like shooting yourself in the foot. I don't know if this is part of the problem, but how the processor comes out of RESET and where it starts executing instructions may figure into your considerations. The usual choices are some locations in low memory like 0x0000 or locations in high memory like 0xFFFF. Which mechanism is used implies where you want the ROM (Read Only Memory) to be located. The other idea involves being able to change the memory map after the processor completes is POWER ON initialization sequence.
It's a simple question of designing memory , you are reading wayyy too much into it and complicating it.
 

Papabravo

Joined Feb 24, 2006
14,410
It's a simple question of designing memory , you are reading wayyy too much into it and complicating it.
I don't think so. I'm just pointing out that there is no "one right answer". As long as your answer meets the basic requirements it should be fine. As long as you focus on the "one right answer", you may just miss the forest for the trees. Remember to observe who gets the extra credit for their answers.
 

MrAl

Joined Jun 17, 2014
7,807
A computer employs RAM chips of 1024 x 8 and ROM chips of 2048 x 4. The computer system needs 2K bytes of RAM, and 2K bytes of ROM and an interface unit with 256 registers each. A memory-mapped I/O configuration is used. The two higher -order bits of the address bus are assigned 00 for RAM, 01 for ROM, and 10 for interface.
a)How many RAM and ROM chips are needed?
b)How many lines of the address bus must be used to access Computer system memory?
How many of these lines will be common to all chips?
c) How many lines must be decoded for chip select? Specify the size of the decoder
d) Draw a memory-address map for the system and Give the address range in hexadecimal
for RAM, ROM
So what dont you understand?

I would do part (d) simultaneously with the RAM and ROM and register selections and while drawing the address lines, You probably also have to assume read and write and i/o lines.
I take 256 registers to be one-quarter K.
 

WBahn

Joined Mar 31, 2012
26,145
A computer employs RAM chips of 1024 x 8 and ROM chips of 2048 x 4. The computer system needs 2K bytes of RAM, and 2K bytes of ROM and an interface unit with 256 registers each. A memory-mapped I/O configuration is used. The two higher -order bits of the address bus are assigned 00 for RAM, 01 for ROM, and 10 for interface.
a)How many RAM and ROM chips are needed?
b)How many lines of the address bus must be used to access Computer system memory?
How many of these lines will be common to all chips?
c) How many lines must be decoded for chip select? Specify the size of the decoder
d) Draw a memory-address map for the system and Give the address range in hexadecimal
for RAM, ROM
You need to provide YOUR best attempt to answer YOUR homework.

What is the data bus with? 8-bits? 64-bits? Makes a huge difference.

What is the "each" refer to with regards to the interface unit? It seems like, "an interface unit with 256 registers," and "an interface unit with 256 registers each," would not mean the same thing. The use of "each" implies multiples, but multiples of what?
 

Papabravo

Joined Feb 24, 2006
14,410
You need to provide YOUR best attempt to answer YOUR homework.

What is the data bus with? 8-bits? 64-bits? Makes a huge difference.

What is the "each" refer to with regards to the interface unit? It seems like, "an interface unit with 256 registers," and "an interface unit with 256 registers each," would not mean the same thing. The use of "each" implies multiples, but multiples of what?
Missed that one. Add another dimension to the universe of non-unique solutions
 

Thread Starter

lucifer0858

Joined Sep 29, 2020
5
You need to provide YOUR best attempt to answer YOUR homework.

What is the data bus with? 8-bits? 64-bits? Makes a huge difference.

What is the "each" refer to with regards to the interface unit? It seems like, "an interface unit with 256 registers," and "an interface unit with 256 registers each," would not mean the same thing. The use of "each" implies multiples, but multiples of what?
I actually tried solving this problem but was also confused by the same EACH issue.. so i took it to be multiple interfaces .. I actually needed a 3rd party solution to this problem to see if what i did was correct, anyways i am attaching my attempt, if it is possible kindly tell me if i did anything wrong and suggest the necessary changes.
 

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Thread Starter

lucifer0858

Joined Sep 29, 2020
5
So what dont you understand?

I would do part (d) simultaneously with the RAM and ROM and register selections and while drawing the address lines, You probably also have to assume read and write and i/o lines.
I take 256 registers to be one-quarter K.
I tried solving it , but i am unsure if its correct thats why i needed a 3rd party solution to compare with mine, if its possible can u check if mine is correct?
 

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WBahn

Joined Mar 31, 2012
26,145
I actually tried solving this problem but was also confused by the same EACH issue.. so i took it to be multiple interfaces .. I actually needed a 3rd party solution to this problem to see if what i did was correct, anyways i am attaching my attempt, if it is possible kindly tell me if i did anything wrong and suggest the necessary changes.
If you can't get a clarification from the instructor, you then either make a reasonable assumption, and state what it is, and go with that or, even better, work the problem for a few possibilities, parameterizing the solution if possible.

I can't look at your work tonight -- too much else going on -- but you won't find a 3rd party solution here. That's not how we work -- and I suspect it's now how your instructor expects you to work either. We will try to guide you along your way, but at the end of the day you need to turn in YOUR best work.
 

Papabravo

Joined Feb 24, 2006
14,410
Nevermind you, if there are so many solutions even one would've worked but you are beating around the bush.. it's very unhelpful.
I see. You were expecting some kind soul to spoon feed you a solution so you could pass it off as your own work. We have a name for that and you probably would not find it complementary.
 

MrAl

Joined Jun 17, 2014
7,807
I tried solving it , but i am unsure if its correct thats why i needed a 3rd party solution to compare with mine, if its possible can u check if mine is correct?
Hello again,

I took a quick look at your solution and i see that you may have the total range for each item ok but i have to ask a small question. Why did you leave a hole in the address space for the RAM?
Usually we want the RAM address space to be contiguous, and the ROM address space also, but the RAM and ROM spaces together dont necessarily have to be contiguous.
So can you mention why you chose to break up the RAM address space?
 

lmaonaman

Joined Sep 30, 2020
3
@MrAl could you please confirm if he has calculated the total ROM chips correctly.

My RAM as well as ROM chips are coming as 2, can you check that again?
(2*1024*8)/(2048*4)=2 for ROM
You have written 1, can you please confirm?
 

Papabravo

Joined Feb 24, 2006
14,410
@MrAl could you please confirm if he has calculated the total ROM chips correctly.

My RAM as well as ROM chips are coming as 2, can you check that again?
(2*1024*8)/(2048*4)=2 for ROM
You have written 1, can you please confirm?
The meaning of what you have written escapes me. If you must be obscure, please try to be obscure clearly.
If you mean that the system requires two 1024 by 8 bit RAM chips
and two 2048 by 4 ROM chips, then I think that is correct as per the original statement
 

MrAl

Joined Jun 17, 2014
7,807
@MrAl could you please confirm if he has calculated the total ROM chips correctly.

My RAM as well as ROM chips are coming as 2, can you check that again?
(2*1024*8)/(2048*4)=2 for ROM
You have written 1, can you please confirm?
Hello,

Well if he needs 2k bytes of RAM and 2k bytes of ROM, then that means 2kx8 bits and 2kx8 bits, and if you only have 1kx8 bit chips then you obviously need 2 RAM and 2 ROM chips.
You just add up the bytes or bits if you prefer.
Memory chips often come in a circuit configuration such as 1k x 8 bits, or 2k x 8 bits, etc. If they come in 1k x 4 bits then to get the full data path width you need two just to get the 8 bit data width. If you need 2k x 8 bits and you only have 1k x 4 bit chips to work with, then you need 2 just to meet the data width spec and then double that to get the 2k address space, so the total chips in that case would be 4.
So you see it is not too hard to figure out, but you do have to get BOTH the address spec right and the data width (usually in bits but not always) correct also.
 

Papabravo

Joined Feb 24, 2006
14,410
@MrAl could you please confirm if he has calculated the total ROM chips correctly.

My RAM as well as ROM chips are coming as 2, can you check that again?
(2*1024*8)/(2048*4)=2 for ROM
You have written 1, can you please confirm?
One more thing. Nobody has used such "small" memory chips in the last three decades. I'm not even sure if anybody still makes them.
 
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