Hi,

I’ve designed the window comparator shown in the images. However, when the input crosses the upper threshold, the output still gives me two pulses instead of staying at logic LOW. There are no problems between the thresholds or below the lower threshold.

Does anyone know what might be causing this or how I can fix it?

 

hi cen,
Welcome to AAC
One method is to add a little hysteresis.
E

 

hi cen,
Welcome to AAC
One method is to add a little hysteresis.
E

First of all, thank you for your time and your answer. But isn’t hysteresis usually used for noisy signals? In my case, I think the circuit is triggering once while the input is rising (when it is between the threshold limits) and again while it is falling.

 

All signals are noisy. LM311 is a high speed comparator and thus is prone to producing glitches on the output. Adding hysteresis will likely solve your problem.

 

All signals are noisy. LM311 is a high speed comparator and thus is prone to producing glitches on the output. Adding hysteresis will likely solve your problem.

Sorry to bother again... I have a problem while creating the inverting comparator hysteresis. In other configurations they put one resistor to a 5V supply. In my circuit, I am trying to connect it to the reference pin, but it distorts my threshold voltage. Could you assist me with this part?

 

To create hysteresis, add positive feedback by adding a resistor from the output (pin-7) to the non-inverting input (pin-2).
Start with a high resistance, e.g. 1 MΩ and decrease it until you get acceptable results.

 

To create hysteresis, add positive feedback by adding a resistor from the output (pin-7) to the non-inverting input (pin-2).
Start with a high resistance, e.g. 1 MΩ and decrease it until you get acceptable results.

But, this only increases my reference voltage and even when the signal crosses it, it still gives me the same result. I was thinking about adjusting the attached configuration.

 

Then you need to adjust the voltage divider resistors to re-calibrate the reference voltage.

 

Then you need to adjust the voltage divider resistors to re-calibrate the reference voltage.

I will play with them a bit and come again

 

Sadly, I still get a similar output with shorter width pulses due to the changing reference voltage (I've almost tried every combination these values were random at the end)

 

I see you have added R9, R10, R11.
Maybe you misunderstood. You only need a single feedback resistor from LM311 pin-7 to pin-2.
What I meant by adjusting the voltage divider, I was referring to adjusting the output of the reference voltage.
I think that you have the connections at the LM336 incorrectly.
LM311 pin-2 should be connected to LM336 pin-2?
I am not sure. I would have to check the datasheet.

 

Hi,

I’ve designed the window comparator shown in the images. However, when the input crosses the upper threshold, the output still gives me two pulses instead of staying at logic LOW. There are no problems between the thresholds or below the lower threshold.

Does anyone know what might be causing this or how I can fix it?

First, it would be helpful if you gave us a much better idea of what you are trying to accomplish. Don't make us try to figure it out by reverse engineering a circuit that you already know doesn't accomplish it.

You want the output to be HI under what conditions?

I'm not familiar with whatever circuit simulator and schematic capture tool you are using, so this may just be an issue of me not understanding the annotations. I can't tell where your input is (I'm guessing at the left side of R7?). It also looks like the negative power supply connections are floating, as is the end of R2, and that the positive power supply nodes are not connected to a power supply. If these are connect to power by some means, what voltages are they connected to? Also, what are teh supply connections for the AND gate?

What is the purpose of a 1 pF cap on the output of the top comparator? How was that size picked?

Does you input signal stay within the bounds of the comparator supply rails? What IS your input signal?

 

I see you have added R9, R10, R11.
Maybe you misunderstood. You only need a single feedback resistor from LM311 pin-7 to pin-2.
What I meant by adjusting the voltage divider, I was referring to adjusting the output of the reference voltage.
I think that you have the connections at the LM336 incorrectly.
LM311 pin-2 should be connected to LM336 pin-2?
I am not sure. I would have to check the datasheet.

According to the datasheet and my real-life circuit, it is pin 2, but in PROTEUS it provides from pin-1. I checked it with probes it works. I tried connecting 1 resistor from pin-7 to pin-2 but it didn't provide a result either. Maybe I was focused on the same circuit and got lost by looking at the specific point. I will try it again.

 

First, it would be helpful if you gave us a much better idea of what you are trying to accomplish. Don't make us try to figure it out by reverse engineering a circuit that you already know doesn't accomplish it.

You want the output to be HI under what conditions?

I'm not familiar with whatever circuit simulator and schematic capture tool you are using, so this may just be an issue of me not understanding the annotations. I can't tell where your input is (I'm guessing at the left side of R7?). It also looks like the negative power supply connections are floating, as is the end of R2, and that the positive power supply nodes are not connected to a power supply. If these are connect to power by some means, what voltages are they connected to? Also, what are teh supply connections for the AND gate?

What is the purpose of a 1 pF cap on the output of the top comparator? How was that size picked?

Does you input signal stay within the bounds of the comparator supply rails? What IS your input signal?

I am so sorry for the inconvenience. Let me explain:

I am trying to design a window comparator. I have two comparators one is connected in non-inverting while the other is connected in inverting configuration. Non-inverting one will pass the signals which are above a certain limit (50mV in this case) while the upper one has to reject the ones which are above a certain limit (1.02V here). These thresholds are given by LM336 regulators to be adjustable later. However, when I give a pulse above the limit, my system provides me 2 pulse. This is wrong since it has to give me a logic LOW signal stating that "no pulse detected between the limits", yet it counts 2 valid pulses instead of 0. This is PROTEUS simulation. My input is labeled as "U1 (-IP)". In PROTEUS, you don't have to give power to the AND gate, it assumes you gave 5 and 0 V. The powers are either 5V or -5V (except the lower LM336, it is 2.5V there) to supply LM311s and pull-up resistors. My input signal is a square signal with 50% duty cycle, 1MHZ frequency and 15ns rise and fall time. I am changing the input voltage. Right now, I am playing between 1.02-1.03V to test the upper threshold. I placed the capacitor there thinking that I may filter the pulses which I don't want to observe but it didn't work.

 

I am so sorry for the inconvenience. Let me explain:

I am trying to design a window comparator. I have two comparators one is connected in non-inverting while the other is connected in inverting configuration. Non-inverting one will pass the signals which are above a certain limit (50mV in this case) while the upper one has to reject the ones which are above a certain limit (1.02V here). These thresholds are given by LM336 regulators to be adjustable later. However, when I give a pulse above the limit, my system provides me 2 pulse. This is wrong since it has to give me a logic LOW signal stating that "no pulse detected between the limits", yet it counts 2 valid pulses instead of 0. This is PROTEUS simulation. My input is labeled as "U1 (-IP)". In PROTEUS, you don't have to give power to the AND gate, it assumes you gave 5 and 0 V. The powers are either 5V or -5V (except the lower LM336, it is 2.5V there) to supply LM311s and pull-up resistors. My input signal is a square signal with 50% duty cycle, 1MHZ frequency and 15ns rise and fall time. I am changing the input voltage. Right now, I am playing between 1.02-1.03V to test the upper threshold. I placed the capacitor there thinking that I may filter the pulses which I don't want to observe but it didn't work.

I'm not looking for an description of how you are trying to solve your problem, I'm asking for a description of the problem you are trying to solve. Think in terms of a customer coming in who needs a black box that does something. What is the something that it needs to do. Don't describe what you think needs to be in the box, describe how the box needs to behave.

For instance: I need a box that takes an analog input signal that can range between -5 V and +5 V. I need it to produce a digital output that is either HI or LO depending on what the input signal is. If the input is between Vlo and Vhi, I want the output to be HI, otherwise I want it to be LO. I need to be able to adjust the Vlo and Vhi thresholds over the full input range.

Then we can have a discussion aimed at fleshing out any holes in the description of what you need the box to do, such as what power supply voltages you have available to connect to the box, or how fast you need the transitions to be. Or how accurate and stable the thresholds need to be. Or whether glitches are acceptable. Or how much delay from the time a threshold is crossed to when the output changes. Some of these may be important, while others may be largely "don't cares".

Once we have a decent understanding of what is needed, then we can start talking about possible ways to achieve it and examining why your circuit isn't doing it.

But, I have to wonder why you think a window comparator won't produce two output pulses per cycle of your input waveform.

Let's say that your waveform goes from -5 V to +5 V and your window thresholds are at 2 V and 4 V, during which your output is HI. Let's walk through one cycle.

Waveform starts at -5 V: LO
Waveform rises above +2 V: HI
Waveform rises above +4 V: LO
Waveform peaks at +5V: LO
Waveform drops below +4 V: HI
Waveform drops below +2 V: LO
Waveform bottoms at -5 V: LO

So, two output pulses per period.

If this is not what you want, then you don't want a window comparator at all. So, please, describe what you need to have in order for the underlying problem to be solved. Let's worry about how to make that happen later.

 

The LM311 is not exactly a "standard comparator", and so it needs to be used a bit differently. IN ADDITION, it needs at least one capacitor directly across the power supply terminals. AND, I think that the output arrangement needs to be a bit different than with a standard comparator. I can easily oscillate ate several megahertz.
Since the LM311 is very fast, it can easily produce multiple pulses while the input voltage is passing thru the threshold value. Hysteresis would help, and certainly it will require adjustment of the resistor values to allow transition at the same voltage.

 

First of all, thank you for your time and your answer. But isn’t hysteresis usually used for noisy signals? In my case, I think the circuit is triggering once while the input is rising (when it is between the threshold limits) and again while it is falling.

If it's a window comparator then that is what it is meant to do.

 

I'm not looking for an description of how you are trying to solve your problem, I'm asking for a description of the problem you are trying to solve. Think in terms of a customer coming in who needs a black box that does something. What is the something that it needs to do. Don't describe what you think needs to be in the box, describe how the box needs to behave.

For instance: I need a box that takes an analog input signal that can range between -5 V and +5 V. I need it to produce a digital output that is either HI or LO depending on what the input signal is. If the input is between Vlo and Vhi, I want the output to be HI, otherwise I want it to be LO. I need to be able to adjust the Vlo and Vhi thresholds over the full input range.

Then we can have a discussion aimed at fleshing out any holes in the description of what you need the box to do, such as what power supply voltages you have available to connect to the box, or how fast you need the transitions to be. Or how accurate and stable the thresholds need to be. Or whether glitches are acceptable. Or how much delay from the time a threshold is crossed to when the output changes. Some of these may be important, while others may be largely "don't cares".

Once we have a decent understanding of what is needed, then we can start talking about possible ways to achieve it and examining why your circuit isn't doing it.

But, I have to wonder why you think a window comparator won't produce two output pulses per cycle of your input waveform.

Let's say that your waveform goes from -5 V to +5 V and your window thresholds are at 2 V and 4 V, during which your output is HI. Let's walk through one cycle.

Waveform starts at -5 V: LO
Waveform rises above +2 V: HI
Waveform rises above +4 V: LO
Waveform peaks at +5V: LO
Waveform drops below +4 V: HI
Waveform drops below +2 V: LO
Waveform bottoms at -5 V: LO

So, two output pulses per period.

If this is not what you want, then you don't want a window comparator at all. So, please, describe what you need to have in order for the underlying problem to be solved. Let's worry about how to make that happen later.

Hi WBahn,


To answer your question about why I thought there wouldn't be pulses: Honestly, I was idealizing the input signal. I wasn't accounting for the rise and fall times physically traversing the voltage window. You are absolutely right—the comparator is doing exactly what it's supposed to do during those transitions.


However, after discussing these results with my seniors, they convinced me that for this specific application, this double-pulse behavior is not acceptable. The final system "Black Box" must result in a signal without pulses if the input goes over the limit.


So, to answer your request for the functional description, here is the behavior I need to engineer:


I need a Pulse Amplitude Discriminator.


• Input: A train of square pulses (1MHz) with varying amplitudes.


• Condition A (Peak < Lower Threshold): Output stays LOW.


• Condition B (Lower < Peak < Upper): Output goes HIGH (detects valid pulse).


• Condition C (Peak > Upper Threshold): Output stays LOW (the system must ignore the pulse entirely, including the rise/fall transition crossings).


Since the decision relies on knowing the peak amplitude (which happens later in time than the initial window crossing), I suspect I need to latch the decision or sample the signal only when it is stable.


Do you have suggestions on how to modify the circuit to achieve this "Pulse Qualification"?

 

Hi WBahn,


To answer your question about why I thought there wouldn't be pulses: Honestly, I was idealizing the input signal. I wasn't accounting for the rise and fall times physically traversing the voltage window. You are absolutely right—the comparator is doing exactly what it's supposed to do during those transitions.


However, after discussing these results with my seniors, they convinced me that for this specific application, this double-pulse behavior is not acceptable. The final system "Black Box" must result in a signal without pulses if the input goes over the limit.


So, to answer your request for the functional description, here is the behavior I need to engineer:


I need a Pulse Amplitude Discriminator.


• Input: A train of square pulses (1MHz) with varying amplitudes.


• Condition A (Peak < Lower Threshold): Output stays LOW.


• Condition B (Lower < Peak < Upper): Output goes HIGH (detects valid pulse).


• Condition C (Peak > Upper Threshold): Output stays LOW (the system must ignore the pulse entirely, including the rise/fall transition crossings).


Since the decision relies on knowing the peak amplitude (which happens later in time than the initial window crossing), I suspect I need to latch the decision or sample the signal only when it is stable.


Do you have suggestions on how to modify the circuit to achieve this "Pulse Qualification"?

And THIS is why we are always trying to get people to tell us what the problem is that needs to be solved instead of asking why their proposed solution to an unstated problem isn't working.

We could have spent huge amounts of time trying to get your approach to work only for you to then discover that whatever problem it solves, it isn't the one that needs solving.

A solution that works for you should be fairly straight forward, but there are a few other things that need to be known. But first, let's see if my understanding is on the right track. Does the following look like something that would be acceptable?



You say that the signal is a train of square pulses at 1 MHz. Does that mean that each pulse lasts 500 ns? If not, what is the minimum and maximum durations of a pulse?

How fast are the edges of the pulses? Are they clean?

What is the maximum voltage that a pulse might ever be?

Are the pulses always a positive voltage relative to the system common (or "ground").

Is there always a gap of 500 ns between successive pulses? If not, what is the minimum gap between them?

What does the output of the detector need to look like? Is it a logic HI that lasts for 500 ns? What constraints are there on the time between when the pulse first crosses the lower threshold and when the detector output goes HI (assuming it does)?

Should the detector output reset automatically so that it is ready to sense the next pulse? Or should it hold its output HI until it is reset by an external signal to acknowledge it?

Is there a system clock available that is running at considerably higher than 2 MHz?

This is probably a problem that would be very ideally suited to using a simple, cheap microcontroller. All you need is one that has an ADC of sufficient range and resolution. Everything else is firmware.

 

You need a peak detect circuit that is reset on the rising edge of each pulse. Then you can apply the window discriminator.