VHDL signal assigment problem ?

Discussion in 'Embedded Systems and Microcontrollers' started by ajapyy, Nov 21, 2014.

  1. ajapyy

    Thread Starter New Member

    Apr 27, 2013
    this is my question :

    We can use a signal assignment statement with inertial delay to remove
    pulses that are smaller than a certain width. Using only signal
    assignment statements, write a code fragment for removing positive
    pulses that are greater than a certain width.

    Thanks eveybody :)