Using Buffers to avoid trasmission line terminations?

crutschow

Joined Mar 14, 2008
34,282
I ave heard that bypassing 74HC isn't strictly necessary apart from a few bypasses here and there. Is this true?
You might be able to get by with only a few caps, but I wouldn't chance it.
CMOS can generate some pretty high current spikes due to overlap current between the N and P MOSFETS when the output is changing states and you want to keep those from causing large voltage spikes on the V+ line.
A second question is about fanout. Usually it's 10 LS loads per each 74HC cmos IC, however isn't it true that from 74HC to 74HC the fanout is virtually unlimited since CMOS takes so little current? So because I don't have a single LS in my design, only CMOS, then I don't really have to worry about fanout unless I am really connecting more than about 50 cmos loads to a single driver?
It's essentially unlimited from a DC point of view.
But each input adds its input capacitance and that slows the rise and fall times.
So you need to look at that with respect to the output drive current and the frequency of operation.
At some point the fanout could slow the rise/fall times to the point that the circuit operation is flaky.
 

Thread Starter

ComputerBuilder

Joined Oct 3, 2017
35
You might be able to get by with only a few caps, but I wouldn't chance it.
CMOS can generate some pretty high current spikes due to overlap current between the N and P MOSFETS when the output is changing states and you want to keep those from causing large voltage spikes on the V+ line.
It's essentially unlimited from a DC point of view.
But each input adds its input capacitance and that slows the rise and fall times.
So you need to look at that with respect to the output drive current and the frequency of operation.
At some point the fanout could slow the rise/fall times to the point that the circuit operation is flaky.

So maybe this slowing down of the rise/fall times itself helps out with reflections as well which is a bonus since my frequency is rather low? I could run this thing at 2/3Mhz and be happy!
 

Thread Starter

ComputerBuilder

Joined Oct 3, 2017
35
So maybe this slowing down of the rise/fall times itself helps out with reflections as well which is a bonus since my frequency is rather low? I could run this thing at 2/3Mhz and be happy!

I would like to share with you a video of my old breadboard computer project. It did work alright but it had a problem in the end because the bus was too long (and I didn't know how to terminate it) so I ended up dismantling it.

 
Last edited:

nsaspook

Joined Aug 27, 2009
13,081
So maybe this slowing down of the rise/fall times itself helps out with reflections as well which is a bonus since my frequency is rather low? I could run this thing at 2/3Mhz and be happy!
I'm sure you could easily clock it faster with careful wire placement and good bypassing.

You can't see the reflections and ringing with the Tek MSO 2012B logic analyzer functionality but the ADS8330 ADC works with no special termination on a 6 inch ribbon cable using the RPI SPI GPIO that can source and sink current to 16 mA (8mA after reset).
https://forum.allaboutcircuits.com/threads/fifo-logic-block-meta-stability.136284/#post-1143241
 

Thread Starter

ComputerBuilder

Joined Oct 3, 2017
35
Something has just come to mind.

Could it be that the output impedance of a driver itself could behave and be used as a series termination located at the driver itself?

If my line has an impedance of 100Ohm and the output impedance of my driver is around 90ohm, would that itself terminate the line and swallow reflections?

In this simulation I added a gate and a resistance emulating its output impedance, and then there is a transmission line of 10 Ohm. As you can see the reflections are swallowed if the resistance matches the line. Is this correct to do, my lovely friends :) ?
 
Last edited:

Thread Starter

ComputerBuilder

Joined Oct 3, 2017
35
Another question that has come to mind now is what happens if the driver's impedance is actually larger than the line's? Then the voltage at the far end is less than the required logic level and how could one fix this? Since theres no way to decrease the output impedance of a particular driver, it seems there's no way to fix the reflections?

Terminating the line at the far end only decreases the voltage levels at the far end.

Is the solution increasing the length of the line? Or is there another solution?
 

nsaspook

Joined Aug 27, 2009
13,081
The solution is to decrease the length of the line and/or slow data speeds & rise/falls times until transmission line effects like line impedance and the reflections from it are negligible to Signal_integrity.
On printed circuit boards, signal integrity became a serious concern when the transition (rise and fall) times of signals started to become comparable to the propagation time across the board. Very roughly speaking, this typically happens when system speeds exceed a few tens of MHz. At first, only a few of the most important, or highest speed, signals needed detailed analysis or design. As speeds increased, a larger and larger fraction of signals needed SI analysis and design practices. In modern (> 100 MHz) circuit designs, essentially all signals must be designed with SI in mind.
 

crutschow

Joined Mar 14, 2008
34,282
If my line has an impedance of 100Ohm and the output impedance of my driver is around 90ohm, would that itself terminate the line and swallow reflections?
Yes it will, if the output impedance is constant as the output changes state, but that's a big if.
Another question that has come to mind now is what happens if the driver's impedance is actually larger than the line's? Then the voltage at the far end is less than the required logic level and how could one fix this? Since theres no way to decrease the output impedance of a particular driver, it seems there's no way to fix the reflections?
True.
You can't have a driver impedance greater than the line impedance and still get the full voltage at the end of the line without reflections.
Is the solution increasing the length of the line?
That would tend to make things worse.

The usual solution would be to use a low impedance line driver.
 
Last edited:

Thread Starter

ComputerBuilder

Joined Oct 3, 2017
35
The solution is to decrease the length of the line and/or slow data speeds & rise/falls times until transmission line effects like line impedance and the reflections from it are negligible to Signal_integrity.
But if it's not possible to decrease the length of the line?

How about using 2 or more drivers in parallel, to decrease the total output impedance? Would that work as well ?
 

Thread Starter

ComputerBuilder

Joined Oct 3, 2017
35
Yes it will, if the output impedance is constant as the output changes state, but that's a big if.
True.
You can't have a driver impedance greater than the line impedance and still get the full voltage at the end of the line without reflections.
That would tend to make things worse.

I thought for a moment that increasing the line would increase its impedance, but then I realize that the characteristic impedance of the line itself is constant isn't it. So that couldn't work :p

Would adding more drivers in parallel decrease the total output impedance and hence improve things?
 

crutschow

Joined Mar 14, 2008
34,282
Would adding more drivers in parallel decrease the total output impedance and hence improve things?
Yes, paralleling outputs would reduce the output impedance by a factor of 1/N where N is the number of outputs in parallel.
But you should only parallel outputs from the same chip, not from different IC's.
 

Thread Starter

ComputerBuilder

Joined Oct 3, 2017
35
Yes, paralleling outputs would reduce the output impedance by a factor of 1/N where N is the number of outputs in parallel.
But you should only parallel outputs from the same chip, not from different IC's.

Ok thank you crutschow, but why not from different IC's if they are the same part number? Variations on each IC even though it's the same part ?
 

MrChips

Joined Oct 2, 2009
30,711
You are using the wrong approach and wrong construction techniques.
Reduce all wiring to minimum lengths and you will not have an issue with transmission line effects at 4MHz.

You previously used commercial jumper cables in your first attempt. What a mess!
Scotch 3M once made the best solderless prototyping system. Too bad it is no longer available.

Your next best choice is wire-wrap.
 

Thread Starter

ComputerBuilder

Joined Oct 3, 2017
35
You are using the wrong approach and wrong construction techniques.
Reduce all wiring to minimum lengths and you will not have an issue with transmission line effects at 4MHz.

You previously used commercial jumper cables in your first attempt. What a mess!
Scotch 3M once made the best solderless prototyping system. Too bad it is no longer available.

Your next best choice is wire-wrap.

Hi MrChips.

If you read my sequence of posts you will that I explained that my first build was cancelled and that I started rebuilding it with a military grade wire wrap board :p

Thanks for the advice anyhow.

That photo of yours, the wires seem very thick. Do you know what gauge they are? I am currently using tin-plated solid copper 30awg, and it's working fine for me as my board has very close pins. pure copper wires seem more appropriate but I guess tin-plated ones are good enough for 4MHz?
 

MrChips

Joined Oct 2, 2009
30,711
Hi MrChips.

If you read my sequence of posts you will that I explained that my first build was cancelled and that I started rebuilding it with a military grade wire wrap board :p

Thanks for the advice anyhow.

That photo of yours, the wires seem very thick. Do you know what gauge they are? I am currently using tin-plated solid copper 30awg, and it's working fine for me as my board has very close pins. pure copper wires seem more appropriate but I guess tin-plated ones are good enough for 4MHz?
Sorry, I didn't read through your entire thread because reflection is not the issue.

The wires appear to be thick because of the magnification of the photo. Those are standard 30AWG wire-wrap wire.
Pure copper will corrode over time. Use tin-plated wire-wrap wire.

The entire minicomputer industry was pioneered by Digital Equipment Corporation (DEC) and their PDP-8, 9, 15, minicomputers were built using wire-wrap.
 

Thread Starter

ComputerBuilder

Joined Oct 3, 2017
35
Sorry, I didn't read through your entire thread because reflection is not the issue.

The wires appear to be thick because of the magnification of the photo. Those are standard 30AWG wire-wrap wire.
Pure copper will corrode over time. Use tin-plated wire-wrap wire.

The entire minicomputer industry was pioneered by Digital Equipment Corporation (DEC) and their PDP-8, 9, 15, minicomputers were built using wire-wrap.
Interesting. I thought the tin was because they were cheap :)

Thanks and best wishes.
 

crutschow

Joined Mar 14, 2008
34,282
Ok thank you crutschow, but why not from different IC's if they are the same part number? Variations on each IC even though it's the same part ?
Yes.
Look at the difference between the nominal and maximum values for the various parameters.
That's how much difference there can be between two parts of the same type.
Differences in prop delay, for example, could cause a momentary output short between the two when changing states.
The difference in prop delay between two outputs on the same chip however, are likely too small to be a problem.
 
Last edited:

Thread Starter

ComputerBuilder

Joined Oct 3, 2017
35
Yes.
Look at the difference between the nominal and maximum values for the various parameters.
That's how much difference there can be between two parts of the same type.
Differences in prop delay, or example, could cause a momentary output short between the two when changing states.
The difference in prop delay between two outputs on the same chip however, are likely too small to be a problem.

Oh right, I see. Thank you very much for your help and time Cruts. Much appreciated.
 
Top