Hello,

I've been dealing with this circuit for 2 days and I couldn't understand yet. The biggest problem I faced is that I can't simulate this circuit. In general, I use QUCS to simulate circuits but CD4060BM doesn't exist in its library. Therefore, I'm trying EasyEDA but something still goes wrong eventhough I set the circuit correctly. I decided to analyze the circuit part by part. It's not hard to understand the purposes of the OpAmps and the instrumentation amplifier. However, I still can't understand the CD4060BM IC. If I set its connections as in the schematic, errors occured on the inputs 9, 10 and 11. I encounter some problems about the nodes of R1, C4, R5. When I substitute the capacitor C4 with a DC voltage source, no error occurs but can't observe any output both in DC and transient simulation. While using a DC voltage source instead of C4, (-V) is read on 9th input and 0V is read on the inputs 10&11. I can't figure out what's going on. Can you help me understanding this circuit, especially the CD4060BM? I am also open to any suggestions for SPICE softwares.

Thanks, regards...

 

hi YE,
Welcome to AAC

In LTSpice I created a hierarchical circuit for the CD4060, by using two CD4024, the CD4060m model works OK.
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hi YE,
Welcome to AAC

In LTSpice I created a hierarchical circuit for the CD4060, by using two CD4024, the CD4060m model works OK.
E

I've never used LTSpice before and I'm having hard time now. Where are Vdd and Vss? How can I set the correct connections and simulate this circuit? I want to observe the output on Q4.

 

Hi,
Clicking on the 4060 or any other IC symbol will pop up the menu showing Vcc etc..
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Hi,
Clicking on the 4060 or any other IC symbol will pop up the menu showing Vcc etc..
E
View attachment 181471

Hello,

Thank you very much. When I try simulating this circuit, I can't observe any signal in transient simulation. I also get "Analyses failed. Iteration limit reached." error when I try op pnt simulation. What should I do? I need your recommendations.

 

Hi,
Please post your LTSpice asc file, I will run the simulation as a check.
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Hi,
Please post your LTSpice asc file, I will run the simulation as a check.
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I uploaded the .asc file and the picture of the circuit that I want to simulate.

 

hi,
You are using a LTS 4060 model created by a fellow member.
I will tag him, he may respond.
He is:
@Alec_t

E

 

CD4060 is a digital circuit. I do not know how simulators work with regards to VDD and VSS.
If you want the simulation to work try scrapping the split ±3V supply and use a single 6V supply or what ever voltages the simulator needs for VDD and VSS.

 

CD4060 is a digital circuit. I do not know how simulators work with regards to VDD and VSS.
If you want the simulation to work try scrapping the split ±3V supply and use a single 6V supply or what ever voltages the simulator needs for VDD and VSS.

Didn't work. Actually, I don't know what to do more. This is my first work in my internship and I couldn't solve it yet. But I'm still hopeful.

 

hi,
You are using a LTS 4060 model created by a fellow member.
I will tag him, he may respond.
He is:
@Alec_t

E

Thanks. I truly need some help. I also tried the .asc files you posted but it couldn't find the symbol and an error occured.

 

hi,
I have just tried using my model with the Vss and Vdd set at +3v and -3V, the outputs still give 0v and 3v pulse levels, so I would say its not going to work.

Can you say why you need +/-3v supply levels and what is the project required to do.?
E

 

Have you tried breadboarding the circuit instead of using a simulator?

 

hi,
I have just tried using my model with the Vss and Vdd set at +3v and -3V, the outputs still give 0v and 3v pulse levels, so I would say its not going to work.

Can you say why you need +/-3v supply levels and what is the project required to do.?
E

The circuit as designed generates a ±3V square wave.

 

hi MrC,
I got that bit OK.

But if he just wants a +/-3V from using a 4060 in the usual way, ie: +6Vss there are easier options available.

E

 

Why are you trying to simulate a CD4060 when the Sim software and you do not understand it??
The Sim software will not even get its oscillator beginning to oscillate.

 

Hi,
Check this out.
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I get frustrated simulating 4060 in Proteus as well. It kind of works but really slows down and takes a lot of resources. The onboard oscillator is complex and usually just set a frequency in the chip property instead. I love thus chip but simulations really fall short in most situations. I find using 4 bit counters useful when I’m trying to simulate it. You can cascade them by feeding the final stage into the next counter clk input.

 

See

 

That's not bad, no propogation delay, does the frequency change based on the RC network?

More info here: https://www.electro-tech-online.com...cd4060b-14-stage-binary-clock-counter.148817/