I'm working on a small project that involves 74XX logic chips and needs the button input to not bounce, so I figured a combination of schmitt trigger and debouncing RC would be needed. Without any ICs on hand, I built the following with 2N3904s:



I now realize that this is a pretty terrible design. R6 is way too high and the threshold values are too close together.This is probably what is causing the button to bounce occasionally when it is let go and trigger a second output.

What I can't figure out is why instead of going up to supply voltage (5V), the trigger output goes up to 3V and then slowly rises up to 5V:
(blue is ST output, red is input node)

There is also another behavior that occasionally happens where the input node doesn't reach supply even when the button is pressed, but instead of not firing or firing, the trigger output starts at 1V and then slowly builds up to supply. This long rise time of course gives the logic chips a real bad time.



Any clue why the trigger output is going to 3V and only slowly finishing it's rise? Or what is going on with the slow starts?

Beyond my immediate troubleshooting questions, it would be great if anyone can recommend a book or other document that has more expansive design equations and explanations for circuits like this. I'm trying to get a better understanding of practical circuits and I'm hoping there are better resources out there than the scattered articles and wikipedia pages on these sorts of circuits. My own B-student circuit analysis is it's own rabbit hole.

 

I think if you change a few resistor values you might see better results.

 

I think if you change a few resistor values you might see better results.

Definitely going to change the values for R1, R2 and R6. What do R3 and R4 do? I get that they control the voltage at base of Q2 when the trigger is off, but I'm not sure how it's quantified.

Also don't know if this would fix my slow rise problems because I don't know what is causing it. I should mention the only thing hooked up to the schmitt trigger output is 74XX pins.

 

Should have mentioned removing C1 also.
Suggest trying the resistor values I posted.

 

Any clue why the trigger output is going to 3V and only slowly finishing it's rise? Or what is going on with the slow starts?

It reaches ~3V when the capacitor charges from an unimpeded current pulse through the button when pressed. At that point Q1 begins to conduct the current away, so the charging from 3-5V happens more slowly. That first current pulse is only limited by the output resistance of the supply and the resistance of the button & wiring.

FYI, this circuit in no way debounces the switch. You need a series resistor between the switch and the capacitor for that.

 

It reaches ~3V when the capacitor charges from an unimpeded current pulse through the button when pressed. At that point Q1 begins to conduct the current away, so the charging from 3-5V happens more slowly. That first current pulse is only limited by the output resistance of the supply and the resistance of the button & wiring.

FYI, this circuit in no way denounces the switch. You need a series resistor between the switch and the capacitor for that.

I'm not quite following you; how exactly does the flow through C1 cause the output to not reach supply? I could see the slow rise speed being related to the charging speed of the capacitor but shouldn't it be done charging nearly instantly?

Definite embarrassing error on my part with the lack of series resistor now that I'm looking at it. I'll be adding that series resistor and tweaking some other values.

 

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I'm not quite following you; how exactly does the flow through C1 cause the output to not reach supply? I could see the slow rise speed being related to the charging speed of the capacitor but shouldn't it be done charging nearly instantly?

Actually I think I was completely wrong there. After playing with some parameters in LTSpice, I figured out how to shape that little 3V plateau.

The duration of the 3V plateau is affected by the reverse transit time parameter of the transistor model for Q2, and the rise time from the 3V up to the final 5V is affected by the "B-C zero-bias depletion capacitance" (output capacitance) parameter. The 3-5V rise time is therefore also affected by Q2's collector resistance since it forms a time constant with the output capacitance, and the resistance also has some effect on the plateau duration.

 

If you are working with 7400 series TTL IC devices the very effective way to debounce a signal is to use a set/reset flipflop.iif you have a double throw button then one side can drive the set and the other the reset. No bounce at all.

 

If you are working with 7400 series TTL IC devices the very effective way to debounce a signal is to use a set/reset flipflop.iif you have a double throw button then one side can drive the set and the other the reset. No bounce at all.

I actually have two spare NOR gates sitting on the design right now, so that's definitely the right engineering approach, but the spirit of the design challenge for myself started with a push button and would be trivial if I used a switch. This is more of an educational project anyways.

Actually I think I was completely wrong there. After playing with some parameters in LTSpice, I figured out how to shape that little 3V plateau.

The duration of the 3V plateau is affected by the reverse transit time parameter of the transistor model for Q2, and the rise time from the 3V up to the final 5V is affected by the "B-C zero-bias depletion capacitance" (output capacitance) parameter. The 3-5V rise time is therefore also affected by Q2's collector resistance since it forms a time constant with the output capacitance, and the resistance also has some effect on the plateau duration.

If I get what you are referring to correctly, Ccbo is in the picofarads. Is there something the design is doing that would make it have such an impact?

See
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Why did you choose identical R1 and R2 values? Doesn't that make it less valuable a a trigger?
Why the two resistors in series on Q1B?

 

If I get what you are referring to correctly, Ccbo is in the picofarads. Is there something the design is doing that would make it have such an impact?

The high value of the collector resistor is why it has such an effect, at least on the time scale we’re looking at. It limits the current needed to charge the junction capacitance, so it takes longer. In an IC schmitt trigger, that resistor would be replaced with another transistor switch, resulting in a higher but shorter current pulse to transition the output from low to high.

 

And why can't the resistors in the collectors be equal? Aren't there some rules?
Resistors serve different purposes. R8 limits the inrush current and reduces the drawdown of the supply voltage. R6 limits the base current.

 

I realized that a schmit trigger is not what you need for debouncing a switch. The solution is an edge triggered input arrangement So a resetable one-shot triggered on the first rise, with a time a bit more than the contact bouncing time, is what is required. That might be as simple as moving the RC time constant to the opposite part oof the schmidt trigger, away from the input side.All that is needed is to slow the trailing edge response a bit more than the bounce time.
You can also achieve that with a "flop-shot", but that requires a FF, a capacitor, and a resistor.

 

Red is Trigger Output, Blue is Input Voltage


A second activation on button release.



I've changed a few components and am now seeing correct results the vast majority of the time. Occasionally when I release the button, the button bounces and causes a second event but I don't know if I can do anything about hat - just a cheap piece of hardware I think. I'm going to be decreasing R6 slightly to help in discharging the cap faster, but I don't think that will solve the problem of those release bounces being so sustained.

However, even that is very rare now, and in all of my tests today I haven't once had a slow start causing undefined behavior. The rise time is slow for a Schmitt trigger but it's fast enough.

That leaves me with the academic questions of why it peaked to 3V previously. The slow rise after that makes sense, but I'm not sure what caused it to fail midway through the spike.

I am also going to play around with some values and see if I can get the trigger rise to be as fast as the fall, but that's a secondary problem now that my circuit is working.

 

I am also going to play around with some values and see if I can get the trigger rise to be as fast as the fall,

Get rid of the capacitor. I've never seen a BJT schmitt trigger use one. Also the current through Q2 should be higher then Q1.
Did you try the component values I show in post #2?

 

Get rid of the capacitor. I've never seen a BJT schmitt trigger use one.

The OP is trying to combine denouncing with schmitt trigger.

 

The schmitt trigger is the debouncer.

 

I've seen small bounces in the input voltage prior to solid contact that are being handled by the cap. If the bounce wasn't high enough to trigger it wouldn't be necessary, but I have yet to try that out. I'll probably build a standalone circuit circuit sometime to try. With the values I have right now, and a lower discharge resistor I think it's a solid trade off. What hurt is the cap doing in your estimation?

I did end up settling with your suggestion of R2 but I wanted a lower low threshold. What are your R3 and R4 values aimed at?

 

What are your R3 and R4 values aimed at?

To insure Q2 conducts faster as the voltage on Q1 collector increases and everything I have read about the collector resistors shows R1 larger then R2.

 

The schmitt trigger is the debouncer.

A schmitt trigger is NOT a debouncer, but rather a circuit to provide a solid change in level with a slowly changing input. Contact bounce is usually a full voltage mechanical oscillation. That is why an edge triggered circuit with some delay on return is used.
The "flop-shot" I suggested is an edge triggered FF with delayed feedback to reset it.