Customer comment: "Works better than existing $20K instrumentation."

Again, not bad for $30 worth of parts cobbled together.

 

Customer comment: "Works better than existing $20K instrumentation."

Again, not bad for $30 worth of parts cobbled together.

So what's next? Is there enough volume for this to turn into an ongoing business for you?

 

So what's next? Is there enough volume for this to turn into an ongoing business for you?

I already have an ongoing business. This will just become another family of products.

 

Is it possible to do better than this?



Perhaps, but I wouldn't want to be the man to try.

 

Oh! And, @cmartinez, no ground plane.

 

Oh! And, @cmartinez, no ground plane.

Man ... that is great news. I already bought the "Noise Reduction Techniques" book that you recommended, but I haven't started reading it... now I will.

And btw, Joey ... you're not the only one who's been avidly working on something new. I too have been developing a top secret project for the last 4 months, and the crucial viability tests will be this weekend... wish me luck!

 

you're not the only one who's been avidly working on something new. I too have been developing a top secret project for the last 4 months...

Post some details...obscure enough that your "competitors" will not figure out what you're doing.

Good luck.

 

For those wanting a bit more detail:

The sensor measures a real-world signal. The physical signal has a strong 1/f component that would stretch out over decades or centuries. That is the reason for the noise increase as frequency approaches DC.

 

My proof-of-concept for the new sensor is complete and fully tested. Here are some final stats:

Power supply: 2 'AA' batteries (about 100 hours of life) or 3-24VDC external power.
Four switching regulators.
Two voltage references.
Three SPI devices: 2 channels of 24 bit A/D @ 7.5 SPS, 2 channels of 24 bit A/D at 60 SPS, 1 channel of 16 bit D/A at 30 SPS.
Two EUSART devices: 1 RS-232 @ 19.2KBaud, 1 Bluetooth Radio at 115KBaud.
One parallel device: 2x16 character LCD display with backlight.
2 channels of on-chip 12 bit A/D at 1,953 SPS.
On-chip EEROM -- write leveled.
4 push-buttons and mechanical quadrature encoder with integrated 5th push-button.

Two on-chip timers: Timer0 and Timer1, and CCPM1 in compare mode attached to Timer 1.

2 hi-priority interrupt sources, 8 low-priority interrupt sources.

16,664 lines of assembly code for an 18F65K22 MCU.
Clock speed: 8Mhz on-chip oscillator.
21,553 of 32,768 bytes of program memory used.
1,907 of 2,048 file registers used.

I can say now, with 100% certainty, that this project could never have been implemented on this hardware in C.

 

I can say now, with 100% certainty, that this project could never have been implemented on this hardware in C.

Kudos for that ... I'm not strictly anti-C, but I'm not a C person either.

 

not bad for $30 worth of parts cobbled together.

... and the hell of a lot of very hard work, I'm sure ...

Post some details...obscure enough that your "competitors" will not figure out what you're doing.

but I already have, the hints are here and there distributed in several threads ...

 

... and the hell of a lot of very hard work, I'm sure ...


but I already have, the hints are here and there distributed in several threads ...

Make a main thread that I can follow.

 

Seems like a wicked cool project, excited (and a bit jealous) for you and your knowledge. I hope you post what it's about sometime soon. I just read 9 pages of posts and still don't know what you're making

 

I just read 9 pages of posts and still don't know what you're making...

That just means I've done my job well.

 

That just means I've done my job well.

Sometimes you remind me of JR Ewing ... the man one just loves to hate ...

 

Sometimes you remind me of JR Ewing ... the man one just loves to hate ...

It starts with a face that only a mother could love...

 

This is a chart of the noise performance with the addition of a 10s digital rise-time filter (RC) at the end of the signal chain. The scaling of the data changed a bit from post 164, so the DC level is about 120 dB, not 140 dB as above.

But, notice that the noise floor beyond 1 Hz is 170 dB (!) down from the DC level.

 

And, while I didn't show it here, the noise actually improves as the DC level gets smaller. I achieved this by using two 24 bit ADCs. The top-end ADC covers about 50dB of the dynamic range. The low-end ADC covers about 100dB of the dynamic range.

The two outputs are blended at the transition for smooth crossover.

 

And, while I didn't show it here, the noise actually improves as the DC level gets smaller. I achieved this by using two 24 bit ADCs. The top-end ADC covers about 50dB of the dynamic range. The low-end ADC covers about 100dB of the dynamic range.

The two outputs are blended at the transition for smooth crossover.

Blended as in averaged? ... or did you use some other technique?

Also, what 24-bit ADC chip are you using?

 

Blended as in averaged? ... or did you use some other technique?

Also, what 24-bit ADC chip are you using?

One is my go-to standard ADS1242. The other is secret for this discussion.

The transition occurs between two defined levels, with each output contributing a portion of the blended signal within the transition band. The proportion of each is just a linear function of the position between the two transition points.