# Positive Pulses in LTSpice retain polarity when passed through a capacitor

#### Sitara

Joined May 2, 2014
57
Hi all,

I'm getting an incorrect result upon passing a positive pulse train through a capacitor in LTSpice (see attached screendump). These particular pulses are 0 - 100mV 10uSec pulses (pulse frequency 10 KHz, 10% dutycycle). The pulses retain their 0 to 100mV polarity even after passing through the capacitor. Changing the frequency, or the dutycycle, or the capacitance makes no difference to this anomaly. A positive sine wave Independent voltage Source (ranging from 0v to Fv where F>0), does correctly change its polarity to -0.5Fv to +0.5Fv when passed through a capacitor, but apparently not the Pulse. What am I doing wrong?

(PS I tried a number of times to upload a screendump of the LTSpice page with the circuit and simulation output but I got the error message "There was a problem uploading your file". I tried with both .jpg & .gif versions - same error msg.)

#### AlbertHall

Joined Jun 4, 2014
11,393
Assuming the capacitor feeds a resistor to ground with a value which gives a time constant much greater than 100uS then what you should see is that the positive part of the waveform is at 90mV for 10uS and the negative part is at -10mV for 90uS. The average DC level therefore is zero. If you make the pulse width 90uS then you should see +10mV for 90uS and -90mV for 10uS - again average DC level is zero. Note that the average DC level for your sine wave is also zero.

#### crutschow

Joined Mar 14, 2008
27,398
I tried a number of times to upload a screendump of the LTSpice page with the circuit and simulation output but I got the error message "There was a problem uploading your file".
Just do a cut and paste into your post.

#### Sitara

Joined May 2, 2014
57
Assuming the capacitor feeds a resistor to ground with a value which gives a time constant much greater than 100uS then what you should see is that the positive part of the waveform is at 90mV for 10uS and the negative part is at -10mV for 90uS. The average DC level therefore is zero. If you make the pulse width 90uS then you should see +10mV for 90uS and -90mV for 10uS - again average DC level is zero. Note that the average DC level for your sine wave is also zero.
Thank you Albert for your prompt response!

That's not what I'm getting. My cap is 1593uF and its free end is grounded via a 200meg resistor giving a time constant of 318600 and I get 0c to 100mV across the load resistor.

I wish I could upload the screendump - is there any trick to doing this which I'm not applying?

#### Sitara

Joined May 2, 2014
57
Just do a cut and paste into your post.
Thanks !
I tried doing that (Ctrl Insert on the image & Shift Insert on the All about Circuits Edit window. Still no dice :-( !

#### AlbertHall

Joined Jun 4, 2014
11,393
That's not what I'm getting. My cap is 1593uF and its free end is grounded via a 200meg resistor giving a time constant of 318600 and I get 0c to 100mV across the load resistor.
You have to leave it running for something like 10 time constants to get the DC level to settle. In this case that means 3186000 seconds, 885 hours!

#### Sitara

Joined May 2, 2014
57
You have to leave it running for something like 10 time constants to get the DC level to settle. In this case that means 3186000 seconds, 885 hours!

Thank you Albert. The sim (with your suggested time) is running now and its looking good.

Its just as you said. It takes its time converging to the expected result doesn't it ?

Many thanks indeed!