Hi I'm stumped with my homework and I would like to ask some help to guide me in answering. I have answered the first part and would like to confirm if my analysis is correct.

For both problems, ideal op-amps are used.

For circuit A, my answers are Vout = 9V, V1 = 3V, I1 = I2 = 3 mA and I3 =0.

For circuit B, I am unsure of my answers since I do not know if Vx = 9 V or Vx = 0.7 + Ie(2K + 1K). In addition to the unknowns, I also have to solve for the power dissipated by the transistor.

I hope that someone can help me see the light. Thanks in advance.

 

For circuit A, my answers are Vout = 9V, V1 = 3V, I1 = I2 = 3 mA and I3 =0.

For circuit A the voltage gain is equal to 1 + 2k/1K = 1+2 = 3V/V
So Vout = 3V * 3 = 9V

For circuit B, I am unsure of my answers since I do not know if Vx = 9 V or Vx = 0.7 + Ie(2K + 1K). In addition to the unknowns, I also have to solve for the power dissipated by the transistor.

If we assume ideal op-amps are used then
V1 = 3V and I1 = 3V/1K = 3mA
And Vx voltage is equal to Vx = ( Vin * (1+ 2K/1K) + Vbe) ≈ 9.7V
And the power dissipated by the transistor is equal to
Ptot = Vce * Ic = ??

 

Thanks. It's nice to see I got the correct answers for circuit A.

However, In circuit B, isn't the KVL equation Vx = ( Vin * (1+ 2K/1K) + Vbe) ≈ 9.7V lacking? I mean shouldn't the 2k and 1k resistors be taken to consideration. Can I assume that Ie = Ic = I1 = 3mA so that I can formulate KVL equations for Vx and Vout?

 

However, In circuit B, isn't the KVL equation Vx = ( Vin * (1+ 2K/1K) + Vbe) ≈ 9.7V lacking? I mean shouldn't the 2k and 1k resistors be taken to consideration.

This equation is not KVL

Vx = ( Vin * (1+ 2K/1K) + Vbe)

Vin = V1 = 3V so

I1 = 3V/1K = 3mA the voltage across 2K resistor will be equal to

VR2 = 3mA * 2K = 6V

and from KVL we have

Vx = V1 + VR2 + Vbe

Can I assume that Ie = Ic = I1 = 3mA so that I can formulate KVL equations for Vx and Vout?

Yes you need to assume that I1 = Ie = Ic because we don't know the BETA of a BJT. But in this problem there is a catch. Do you know where ?

 

You're right. However I forgot to note that beta is infinite for the transistor. Does that invalidate our assumption that I1 = Ie = Ic?

Wow there's a catch. Damn. I don't really see one unless we are talking about the transistor being saturated since Vx being much greater than 0.7V. I would greatly appreciate it if you could point it out sir. Please.

 

If the current were 3mA in the 3k, transistor, 2k and 1k what would the voltage drop Vce be, given the supply is 15V???

 

If the current were 3mA in the 3k, transistor, 2k and 1k what would the voltage drop Vce be, given the supply is 15V???

Yeah it's a problem since Vce would be equal to -3V. Maybe there is a typo error in the given.

 

I think the catch is that the transistor is saturated. You can still solve for all voltages and currents if you know what Vce(sat) is, or if you assume that it's zero.

 

I agree with RonH's assessment. The transistor is in saturation with the given parameters.

hgmjr

 

I would also think the op-amp itself is saturated since V1 can't be adjusted to match the 3V input.

 

I would also think the op-amp itself is saturated since V1 can't be adjusted to match the 3V input.

The saturated transistor does not preclude the op amp from forcing V1 to 3V. The emitter will be at 9V, the collector at (9V+Vce(sat)), and the base at 9.7V. The op amp has to contribute 1mA to the feedback resistor, through the forward-biased base-collector junction.

 

Thanks for all the help. I understand now.