Piezo driver with +-20V using LTC7060 gate driver: 128kHz frequency

Thread Starter

19Teju91

Joined Oct 8, 2024
3
Hello everyone,

I am currently working on a piezo driver designed for a 2.5nF load with a maximum current ranging between 50 to 100mA with a frequency of 128kHz. Since the load requires a sine wave for operation, I have created a simulation in LTspice using the LTC7060 IC.
However, I am facing difficulty increasing the dead time (dead band) between the turning off of the second MOSFET and the turning on of the first MOSFET. The design uses a full H-bridge configuration to achieve this. I would appreciate your guidance on how to increase this dead time.

Additionally, I am looking for solutions to generate sine waves with amplitudes of ±20V and ±50V (for two different piezo devices) while keeping the current within a maximum of 100mA.

I have attached the simulation files for your reference.

Thank you in advance for your support.

DT.jpg
 

Attachments

MisterBill2

Joined Jan 23, 2018
27,312
How about a "push-pull two device oscillator using a resonant circuit to set the frequency?? The immediate advantage is that it would be simple to have a sine wave. It would functionally need to be either a class "AB" or maybe a class "A" amplifier with a resonant load circuit. The technical name will be a "push-pull power oscillator", which is a very mature concept that goes back about a hundred years.
The unknowns for the project are the frequency stability and accuracy, and the available power to operate with.
 

ronsimpson

Joined Oct 7, 2019
4,660
That is 600A pk. in the MOSFETs. They will run hot. Only 160mA in C7.
1755381007051.png
You have too much current in L1, C2,3. Not much current in C7. This needs fixed.

Now L1 & C2,3 are the resonant filter. I think you should make L1 much bigger and reduce C2,3 until the caps almost disappear.
 

MisterBill2

Joined Jan 23, 2018
27,312
That is 600A pk. in the MOSFETs. They will run hot. Only 160mA in C7.
View attachment 354314
You have too much current in L1, C2,3. Not much current in C7. This needs fixed.

Now L1 & C2,3 are the resonant filter. I think you should make L1 much bigger and reduce C2,3 until the caps almost disappear.
Unfotyunately I am not able to open the .asc file, that requires a simulator program that I do not have.
 

Thread Starter

19Teju91

Joined Oct 8, 2024
3
How about a "push-pull two device oscillator using a resonant circuit to set the frequency?? The immediate advantage is that it would be simple to have a sine wave. It would functionally need to be either a class "AB" or maybe a class "A" amplifier with a resonant load circuit. The technical name will be a "push-pull power oscillator", which is a very mature concept that goes back about a hundred years.
The unknowns for the project are the frequency stability and accuracy, and the available power to operate with.
Thank you for the response, added the details below,
Frequency stability : ±0.1%
Accuracy: ±10%Hz
Available power: 24V with 3-4A
 

Thread Starter

19Teju91

Joined Oct 8, 2024
3
That is 600A pk. in the MOSFETs. They will run hot. Only 160mA in C7.
View attachment 354314
You have too much current in L1, C2,3. Not much current in C7. This needs fixed.

Now L1 & C2,3 are the resonant filter. I think you should make L1 much bigger and reduce C2,3 until the caps almost disappear.
Thank you for the response, modified the design for the resonance and added the updated file
 

Attachments

MisterBill2

Joined Jan 23, 2018
27,312
You will have less distortion with a resonant transformer inverter. I am not sure which will be the most efficient, but an optimized inverter can provide very low distortion.
So the question becomes an issue between max efficiency and minimum distortion.
 

fourtytwo

Joined May 16, 2022
20
hi 19,
In your redesign, the Gate 1 and Gate 2 periods are not the same, hence distorted output Sine.
E


View attachment 354361
I think this is caused by the delay parameter on V5 that should be exactly half the period.
Secondly I think you could turn of your mosfets faster with a schottky (eg bat54) across R4,5,11&12 anodes to gate.
According to the spec 500K deadtime resistors are the same as none and will result in just 75nS so you have to get your mosfets off that fast! Or use a different drive chip or mosfet.
Why are your PWM inputs not exactly 50% duty cycle ? with that chip you cannot influence DT externally via the PWM input but maybe you have another reason.
 
Top