@dl324 Super and Subscripts have been a problem for me as I like to use standard capitalization or lowercase as required. LaTex may solve that for me. Won't know until I use it more and find out just where it can be used and cannot. Thx for the tip!

 

As I recall, Word is easier. But I don't have it on the computer I'm using.

So, you are using a word processor with LaTex first and then cut and paste?

 

So, you are using a word processor with LaTex first and then cut and paste?

I use the word processer's features, which aren't LaTeX. Then I cut and paste from what's rendered.

 

Not at all other than using a resistor.


Unfortunately, the diode models for LTS are not available...


Please do.

I'm going to spend some time simulating and breadboarding and taking measurements. I need to better understand the Vce as the transistor comes out of cutoff and reaches full saturation.

Hello again,

There are a lot of diode models available in LT Spice if that's what you are referring to.

Here is a drawing of the circuit and the graph of the output as the input increases from 2v up. This is about the simplest model you can use if you want to really understand the operation of the transistor and the way saturation works. It's interesting i think that the internal gain (Beta) of the transistor never changes but the measurement from the outside of the transistor (the real base lead) makes it look like the transistor gain goes down substantially.

Note the black rectangle can be ignored it's a short circuit that just measures the current from outside the transistor and uses that to set the collector current as in iC=iB*Beta. The Beat vs input voltage is shown in the graph, but more interesting is the input current into the base through the 1k resistor because when we measure that and compare it to the collector current it looks like the total Beta is decreasing. The internal Beta is not decreasing, but it looks that way externally because the collector base diode D2 begins to conduct part of the base current away from the internal base and so the collector current source I1 does not produce as much current (that current is dependent on the internal base current and multiplied by 20 which is the internal Beta of the NPN).

The thing to look at in particular is the conduction of D2. As it starts to become forward biased the conduction takes some of the internal base current away from the transistor so the external collector current can not rise as much.
If you are not interested in the saturation operation then just ignore D2 and keep the input voltage low like less than maybe 5 volts.

If any of this is not clear just let me know i'll provide more information.

 

Ok, I've been working with it a bit and starting to see what is happening.