Hi I want to simulate this IR2103 based half bridge circuit but LT spice seems to be throwing an error: "Analysis: Time step too small; initial timepoint: trouble with node "u1:_gd_template:_input_stage:_lin_thutp""

I got the spice model for the IR2103 from https://www.infineon.com/cms/en/pro...3s/#!?fileId=5546d4627956d53f01796069eea87040

This is my circuit:


Could someone please help me understand what I may be doing wrong here?

 

Hi B99,
Please post your asc file and the model files.
E

 

@ericgibbs is this sufficient ?

Hi B99,
Please post your asc file and the model files.
E

 

By default the 'A' devices operate at 1V logic level. You need to right-click the A1 and A2 symbols and set a higher logic level, e.g. 5V.

 

By default the 'A' devices operate at 1V logic level. You need to right-click the A1 and A2 symbols and set a higher logic level, e.g. 5V.

Right clicking doesn't reveal such an option.

 

Hi,
Enter on Value Line: Vhigh = 5V
E

 

The symbol is not correct and the chip control is not correct. At least two errors.

 

I had the same problem like you but I changed the approach , also take a look at the datasheet of the gate driver. The waveforms on the HIN and \LIN should be the same in order for inverting to happen on HO and LO.

Spice files are taken from Infineon website: https://www.infineon.com/part/IR2103S

 

@smpm
Welcome to AAC!
This thread is nearly two years old. The original poster is likely to have moved on.

 

@smpm
Welcome to AAC!
This thread is nearly two years old. The original poster is likely to have moved on.

In case somebody else runs into this.