Ltspice Hbridge DC-AC converter with GaN FET

Thread Starter

Rag0203

Joined Feb 27, 2020
9
Hello, I'm working about a DC-AC converter with 400kHz switching frequency. I'm trying to simulate it in Ltspice using the model provided by the manufacturer of the transistor that is a GS66516B by gansystems ( https://gansystems.com/gan-transistors/gs66516b/ ). I want to evaluate power losses and then compare them with measures. I realized a sinusoidal PWM control signal with a dead time of 100ns and the Vgs has a range of -3V / 6V.
Voltage and current on the load are good but I found problems with the source current because there are high peaks and I can't understand why.
This is the model:
1.JPG
These are the PWM signals and the Vgs: there are fluctuations when the waves have different lenght
2.JPG

3.JPG

And these are Drain currents for first and second switch and source current
4.JPG

What can I do? If you want i can post simulation files. Thanks in advance!
 

Thread Starter

Rag0203

Joined Feb 27, 2020
9
Hello, I'm working about a DC-AC converter with 400kHz switching frequency. I'm trying to simulate it in Ltspice using the model provided by the manufacturer of the transistor that is a GS66516B by gansystems ( https://gansystems.com/gan-transistors/gs66516b/ ). I want to evaluate power losses and then compare them with measures. I realized a sinusoidal PWM control signal with a dead time of 100ns and the Vgs has a range of -3V / 6V.
Voltage and current on the load are good but I found problems with the source current because there are high peaks and I can't understand why.
This is the model:
1.JPG
These are the PWM signals and the Vgs: there are fluctuations when the waves have different lenght
2.JPG
3.JPG
And these are Drain currents for first and second switch and source current
4.JPG

What can I do? If you want i can post simulation files. Thanks in advance!
 

pustilnik

Joined Sep 19, 2019
4
Hello, I'm working about a DC-AC converter with 400kHz switching frequency. I'm trying to simulate it in Ltspice using the model provided by the manufacturer of the transistor that is a GS66516B by gansystems ( https://gansystems.com/gan-transistors/gs66516b/ ). I want to evaluate power losses and then compare them with measures. I realized a sinusoidal PWM control signal with a dead time of 100ns and the Vgs has a range of -3V / 6V.
Voltage and current on the load are good but I found problems with the source current because there are high peaks and I can't understand why.
This is the model:
View attachment 200091
These are the PWM signals and the Vgs: there are fluctuations when the waves have different lenght
View attachment 200092
View attachment 200093
And these are Drain currents for first and second switch and source current
View attachment 200094

What can I do? If you want i can post simulation files. Thanks in advance!
Hi,

I can't simulate right now your circuit, but i believe this great current is caused because of the
discontinuity for dead time + inductor as a filter. You can reduce that projecting a LC filter in cut frequency of 1 kHz~ or a little bit more.

You didn't post the Voltage waves, but i'm sure this is overvoltaging too.
 

Thread Starter

Rag0203

Joined Feb 27, 2020
9
Thanks a lot for the answer
Yes that will help. I have a very hard day but maybe when I get back.
Do you have an example circuit where the GS66516B is being used in SPICE?
Here my simulatione files. I didn't find anything about my switch. Here there is a presentation about evaluation of switching losses https://gansystems.com/wp-content/uploads/2018/05/GN008-GaN_Switching_Loss_Simulation_LTspice_20180523.pdf and they use this double pulse test https://gansystems.com/wp-content/uploads/2018/05/GN008_GANSYS_Half_Bridge_Switching_Test_v2.asc . I tried to use the same gate control circuit but without good results for my work

Hi,

I can't simulate right now your circuit, but i believe this great current is caused because of the
discontinuity for dead time + inductor as a filter. You can reduce that projecting a LC filter in cut frequency of 1 kHz~ or a little bit more.

You didn't post the Voltage waves, but i'm sure this is overvoltaging too.
I checked also the voltages (Vds and Vload) but they don't have any peak
5.JPG
 

Attachments

pustilnik

Joined Sep 19, 2019
4
Thanks a lot for the answer

Here my simulatione files. I didn't find anything about my switch. Here there is a presentation about evaluation of switching losses https://gansystems.com/wp-content/uploads/2018/05/GN008-GaN_Switching_Loss_Simulation_LTspice_20180523.pdf and they use this double pulse test https://gansystems.com/wp-content/uploads/2018/05/GN008_GANSYS_Half_Bridge_Switching_Test_v2.asc . I tried to use the same gate control circuit but without good results for my work



I checked also the voltages (Vds and Vload) but they don't have any peak
View attachment 200101
Rag, you used the "wrong" Reference to measure voltage, the right one is the UA-UB, which correctly represents the voltage created by the descontinuity. You should use a capacitor in paralel with the load to reduce this peak, or/and a snubber circuit. If you don't, the tension applied at the semiconductors will be destructive to it
 

Thread Starter

Rag0203

Joined Feb 27, 2020
9
Rag, you used the "wrong" Reference to measure voltage, the right one is the UA-UB, which correctly represents the voltage created by the descontinuity. You should use a capacitor in paralel with the load to reduce this peak, or/and a snubber circuit. If you don't, the tension applied at the semiconductors will be destructive to it
I've already tried to insert a capacitor in parallel with the load (from 10pf to 100pf) but nothing has changed. Here the load voltage
6.JPG
 

Thread Starter

Rag0203

Joined Feb 27, 2020
9
Your LC Filter is projected to 1 MHz Frequency, it's too high.

Considering your 300 uH inductor. Try something close to 100 uF.
Thanks for your help and your patience. Here is the Vgs Id (for the first switch) and the Isource with the 100 uF capacitor.(the first part of simulation because it takes some hours to finish a complete period). Seems that peaks remain.
7.JPG

This is the complete curve of the current of load and source for a complete period without the 100uF capacitor
9.JPG
 

Attachments

ronsimpson

Joined Oct 7, 2019
611
How did you decide on 2nH of Gate inductance? (I see where that number came from)
My computer will not allow me to open .RAR files.
I have the file open from post #6. I do not have the transistor models.
I think the transistors are not turning off well.
 
Last edited:

Thread Starter

Rag0203

Joined Feb 27, 2020
9
Another way to deal with non linearity in 2 legs inverters (full bridge) is use a three level PWM
https://granitedevices.com/wiki/3-level_PWM_vs_2-level_PWM
I'm not sure if it will reduce a lot, so to minimize it you need a snubber circuit in paralel of transistors
With a three level PWM I'll reduce the ripple of the current on the load, right? Do you think maybe it'll help also for source current? Tomorrow I'll try it and also the snubber circuits.
 

ronsimpson

Joined Oct 7, 2019
611
I started the simulations without gate inductance and I found current peaks for Isource. Then i tried with this value of Lgate (2nH and 3nH) that I found in the double pulse test circuit that I linked above used by the manufacturer
I noticed there are three levels of models. Lever 3 has 2nH built-in. Level 1 has none.
 

Thread Starter

Rag0203

Joined Feb 27, 2020
9
Good evening at all. I found the problem: if you notice in the first image I've posted The gate voltage (blue) in the circle rises above the threshold voltage level of 1 V,therefore, Drain current can flow. The other transistor in the half bridge is turned on and there is short circuit. I added different Rg for turn on and turn off and reduced the Vgs to -3V/+3V and so the peaks on the source faded.

Thanks to all for the help and the time!
 
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