WBahn

Joined Mar 31, 2012
32,871
in that case i'd have to debounce my switch?
The debouncing issue is completely distinct from the issue of someone actually activating the switch multiple times when they shouldn't.

You have to assume that your users play by the rules (but you should state that in your project write-up).

The debouncing issue is going to haunt you even for someone playing by the rules. When you activate your switch for someone entering the room and there are currently 8 people in the room, you probably don't want your display to jump to 12 people. But that's what will happen if the logic sees three bounces before it settles to the final state. Mechanical switches can bounce dozens of times within a span of about ten milliseconds, Since you can't use an MCU, you can't debounce them in software, so you need to debounce them in hardware.
 

Thread Starter

Hornett

Joined May 15, 2026
27
The debouncing issue is going to haunt you even for someone playing by the rules. When you activate your switch for someone entering the room and there are currently 8 people in the room, you probably don't want your display to jump to 12 people. But that's what will happen if the logic sees three bounces before it settles to the final state. Mechanical switches can bounce dozens of times within a span of about ten milliseconds, Since you can't use an MCU, you can't debounce them in software, so you need to debounce them in hardware.
o.. so i have to deal with this in hardware, since the issue doesn't affect the simulation on quartus... damn.. alright thank you
 

dl324

Joined Mar 30, 2015
18,333
okay thank you for the advice, isn't it late for you? maybe? you've been helping me all day which i deeply appreciate!
I've been off and on the computer all day. I check AAC when I don't have anything better to do. But it's not late (mid-afternoon now).
 

Thread Starter

Hornett

Joined May 15, 2026
27
I've been off and on the computer all day. I check AAC when I don't have anything better to do. But it's not late (mid-afternoon now).
You browse AAC for fun? or to help people? and you help tons of people I assume, I commend you for your efforts, you've probably helped tons of people really

I'll probably sleep soon, its 1:20 am, and then wake up at 8 to go to uni, then build hardware, my presentation is on 1:30 pm, then when I come home i'll tell you how it went, if you're interested atleast
 

dl324

Joined Mar 30, 2015
18,333
You browse AAC for fun? or to help people?
Very infrequently, I have a question to ask. Mostly it's to help others.
if you're interested atleast
I'm interested.

The last person I helped who was using Quartus, his circuit (a 12-hour clock) didn't even work, but he got 100% because the examiner didn't even try to read his (messy) schematic. I tried to explain to him why his circuit wasn't working, but it fell on deaf ears because he was convinced it worked because the examiner said so. But that's how I knew that Quartus interfaced with the Altera FPGA board.
 

Thread Starter

Hornett

Joined May 15, 2026
27
The last person I helped who was using Quartus, his circuit (a 12-hour clock) didn't even work, but he got 100% because the examiner didn't even try to read his (messy) schematic. I tried to explain to him why his circuit wasn't working, but it fell on deaf ears because he was convinced it worked because the examiner said so. But that's how I knew that Quartus interfaced with the Altera FPGA board
that made me laugh, well Quartus is really.... idk i just don't like it, its a bit confusing, like i didn't know how to implement a 5-bit up/down counter on quartus but I just discovered I can put code on a VHDL or something like that, and running simulations is a biiit annoying, not like LTspice which is more smoother and better imo, although theyre different in a sense

frankly im not expecting to get that high of a grade, altho it does make 20% of my final grade, I'm hoping for atleast 14.. this is my final project then I can finally rest for a couple weeks before my summer semester.. well i still need to get my drivers license, I've been putting it off for a bit.

How about you, how's life
 

WBahn

Joined Mar 31, 2012
32,871
o.. so i have to deal with this in hardware, since the issue doesn't affect the simulation on quartus... damn.. alright thank you
Simulators generally assume nice, clean signals. They also tend to make other assumptions, like an unconnected logic input behaves like a logic LO, or that logic gates have infinite drive capability, which lulls people into assuming that the real world behaves like that, too. The real world tends to bite them at some point.

Debouncing your switches is actually pretty easy. The simplest way is to just use an RC low-pass filter with a time constant of somewhere around 20 ms to 100 ms. That is slow enough to kill most mechanical bounce but fast enough to be seen as responsive by human operators. A better way is to use SPDT switches and an RS latch. If you have them handy, consider it. There are also ICs that are intended for switch debouncing applications, but I don't recall the part numbers off-hand.
 

Thread Starter

Hornett

Joined May 15, 2026
27
The real world tends to bite them at some point.
yeah.. it happened in my previous project.. i was building a heartbeat detector with blinking LED and a threshold with 5 second delay and buzzer, then I assumed that the Voltage divider on a voltage comparator's V- doesn't affect the rest of the circuit (with its resistance), since ideally a comparator has inf resistance, but then.. well in actual hardware i got my ass bit


Debouncing your switches is actually pretty easy. The simplest way is to just use an RC low-pass filter with a time constant of somewhere around 20 ms to 100 ms. That is slow enough to kill most mechanical bounce but fast enough to be seen as responsive by human operators.
ohhhhh, okayy so id have to design the time frame where it doesn't take any other "bounces"

thank you for the advice
 

Thread Starter

Hornett

Joined May 15, 2026
27
I'm interested.
okay well, the circuitt didnt fully work, he said the circuit is 25% of the grade, 50% is quartus simulation and the other 25% is individual understanding of our own parts.. I believe I was able to understand a lot thanks to you and the other person so thank you, and regarding Quartus I submitted half of it more or less, and the circuit itself maybe I'll get half the grade, so I can only hope.. I appreciate the help, thank you
 

Irving

Joined Jan 30, 2016
5,132
Though the official exercise is over, you should try and complete it and get a working solution, even if you don't actually build it physically, for your own understanding and satisfaction. I've had a play with solving this and, notwithstanding the holes in the specification, some of which have been discussed here, it's quite challenging to find an optimal (ie minimum chip count) solution. Obviously no one would build it with discrete logic these days, it's much simpler, but still not trivial, with a microcontroller.
 

Thread Starter

Hornett

Joined May 15, 2026
27
Though the official exercise is over, you should try and complete it and get a working solution, even if you don't actually build it physically, for your own understanding and satisfaction. I've had a play with solving this and, notwithstanding the holes in the specification, some of which have been discussed here, it's quite challenging to find an optimal (ie minimum chip count) solution. Obviously no one would build it with discrete logic these days, it's much simpler, but still not trivial, with a microcontroller.
Sorry for not being clear about the specifications, and I'll think about it in my free time, I appreciate your interest towards this project and your advice! I hope to be as dedicated as you are to such an interest, truly
 
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