Hello, I am a bit hesistant to ask for help and im sorry, but I have a final project due soon and i have to build an attendance system but I'm struggling a bit and I'm cramped on time due to previous exams and projects,

In it I can only use IC Chips and no microcontrollers

It has 4 switches (Student Enters, Student Exits, Lock Door, Reset Session):
- Everytime a student enters or leaves, I should have a 7-Segment Display that displays the count of the students in the class (0-30) Max Capacity is 30 [I should have bits covering 30 states)
- When the door is locked, the student count can't change, if it is unlocked, the timer resets and student count doesn't change
- When the reset switch is set, both capacity and counter timer will reset

It should also have a 10 second countdown, so two 7-Segment Displays (10-0)

Additionally I have to Design my own clock using a 555 Timer which I found this for












Initially: 0 Students, 10 Timer starts counting down

LED Outputs:
- Green LED light indicating if the entrance is allowed (Under 15 Students, Above 5 seconds left)
- Red LED light indicating if the entrance is restricted (Locked Door, 30 Maximum Capacity or Countdown hit 0 seconds)
- Orange LED indicating if half time passed or half capacity achieved (Above 15 Students in, 5 and under seconds left)

Display Outputs:
- A seven-segment that displays the Time remaining for entering (Count Down from 10-0) (10 seconds) [If this gets complicated I was thinking to make it 9-0]
- A seven-segment that displays the number of students remaining (0-30) [Two 7 Segment displays)
- A seven-segment that shows O if the access is allowed and L if the door is locked


Its also required of me to design a Finite State Machine and a state table, in it, a RESET state is required and for the state table should be built up using current states bits, inputs, outputs, and next state bits

then ill use the state table to get the functions of the output

At the end i build it everything on Quartus then build the hardware and then do breadboard soldering and pack the design


Can i please get any advice or help?

 

Hello, I am a bit hesistant to ask for help and im sorry, but I have a final project due soon and i have to build an attendance system but I'm struggling a bit and I'm cramped on time due to previous exams and projects,

In it I can only use IC Chips and no microcontrollers
View attachment 367227
It has 4 switches (Student Enters, Student Exits, Lock Door, Reset Session):
- Everytime a student enters or leaves, I should have a 7-Segment Display that displays the count of the students in the class (0-30) Max Capacity is 30 [I should have bits covering 30 states)
- When the door is locked, the student count can't change, if it is unlocked, the timer resets and student count doesn't change
- When the reset switch is set, both capacity and counter timer will reset

It should also have a 10 second countdown, so two 7-Segment Displays (10-0)

Additionally I have to Design my own clock using a 555 Timer which I found this for
View attachment 367226











Initially: 0 Students, 10 Timer starts counting down

LED Outputs:
- Green LED light indicating if the entrance is allowed (Under 15 Students, Above 5 seconds left)
- Red LED light indicating if the entrance is restricted (Locked Door, 30 Maximum Capacity or Countdown hit 0 seconds)
- Orange LED indicating if half time passed or half capacity achieved (Above 15 Students in, 5 and under seconds left)

Display Outputs:
- A seven-segment that displays the Time remaining for entering (Count Down from 10-0) (10 seconds) [If this gets complicated I was thinking to make it 9-0]
- A seven-segment that displays the number of students remaining (0-30) [Two 7 Segment displays)
- A seven-segment that shows O if the access is allowed and L if the door is locked


Its also required of me to design a Finite State Machine and a state table, in it, a RESET state is required and for the state table should be built up using current states bits, inputs, outputs, and next state bits

then ill use the state table to get the functions of the output

At the end i build it everything on Quartus then build the hardware and then do breadboard soldering and pack the design


Can i please get any advice or help?

Solve the most difficult part first
The clock, if you have minimal idea of what it is, should be, dare to say, trivial for you.
Buena suerte.

 

Solve the most difficult part first
The clock, if you have minimal idea of what it is, should be, dare to say, trivial for you.
Buena suerte.

Okay thank you for the fast reply

 

I'm cramped on time due to previous exams and projects

When is the assignment due?

I can only use IC Chips and no microcontrollers

What logic family are you going to use? The 555 timer is available in bipolar and CMOS, but the bipolar timer typically interfaces with CMOS without needing a pullup resistor on the output.

build the hardware and then do breadboard soldering and pack the design

This will probably take the most time, so plan accordingly.

 

When is the assignment due?

Its due in 20 hours but i have a team of 2 other people with me, on the bright side all the other teams are in the same siituation as us

What logic family are you going to use? The 555 timer is available in bipolar and CMOS, but the bipolar timer typically interfaces with CMOS without needing a pullup resistor on the output.

I'm gonna use TTL ic chips (like 74LSXXX)

This will probably take the most time, so plan accordingly.

Yeah its a bit hard, im probably not gonna finish it in time

 

Its due in 20 hours but i have a team of 2 other people with me, on the bright side all the other teams are in the same siituation as us

How much time were you given?

At least you can dole out subcircuits to different people.

Its also required of me to design a Finite State Machine and a state table

Have you done this part?

 

How much time were you given?

Honestly the last couple weeks of the semester but we had other projects and exams (including a heartbeat sensor and application designing and other hard exams so only now were we able to find time

Have you done this part?

Yes I just did the FSM

S0 is RESET state (initial state and is required), S1 is OPEN with outputs Green LED and display O (Open), S2 is Half state where output is Orange and display O, S3 is CLOSED state with red LED and display L, and LOCKED state which is the manual lock

 

Honestly the last couple weeks of the semester but we had other projects and exams (including a heartbeat sensor and application designing and other hard exams so only now were we able to find time

Typical time management problem.

Yes I just did the FSM

Have you done the state table?

 

Typical time management problem.
Have you done the state table?

Yes its sad to say, but nearly everyone has faced this too.. except the ones that dropped a couple courses

Have you done the state table?

I haven't yet as I'm helping divide the tasks and we just finished the counter (not countdown)

 

I haven't yet as I'm helping divide the tasks and we just finished the counter (not countdown)

But formal design is state machine, state table, then implementation. So you've skipped a step.

Also:

- Everytime a student enters or leaves, I should have a 7-Segment Display that displays the count of the students in the class (0-30) Max Capacity is 30 [I should have bits covering 30 states)

- A seven-segment that displays the number of students remaining (0-30) [Two 7 Segment displays)

Students in the class and students remaining sound like different counters to me.

 

Students in the class and students remaining sound like different counters to me.

Oh, yeah sorry I had an error, its number of students remaining

But formal design is state machine, state table, then implementation. So you've skipped a step.

Yes but we didn't have much time so they decided to hurry with a counter at first, and in regards to the state table.. well im struggling a bit right now and I don't even know If i'm doing it correctly

 

I had an error, its number of students remaining

So both counters are count down and whatever counter you started with is wrong.

 

So both counters are count down and whatever counter you started with is wrong.

Both are countdown yes thank you for pointing it out, and they just finished building a clock using a 555 timer I mean not a counter

 

in regards to the state table.. well im struggling a bit right now and I don't even know If i'm doing it correctly

It's definitely not complete.

You should have all combinations of the inputs combined with the current state of the counters.

Also, the "Registers" box mentions flip flops. Are you allowed to use up/down counter ICs? Or do you need to design the counters using flip flops?

If you've paraphrased the problem description, the actual problem description would be helpful.

 

It's definitely not complete.

You should have all combinations of the inputs combined with the current state of the counters.

Yes I'm still working on it, my main issue is that do I need to put the next state for all 5 bits that cover all 30 states? Or can I remove it representing for example when there's 2 to 12 students I can remove it from the state table and only put the states where there's change

Also, the "Registers" box mentions flip flops. Are you allowed to use up/down counter ICs? Or do you need to design the counters using flip flops?

If you've paraphrased the problem description, the actual problem description would be helpful.

The system will use FSM to check if the student has completed a valid entry or exit sequence, and will use a 5-bit synchronous up/down counter to maintain the number of students currently in the classroom so yes i can use an up/down counter

and there's also:
- The system will use feedback from the counter (ZERO and MAX) to impose conditions that will prevent the counter from underflowing (going below zero) and will limit maximum occupancy of the classroom to 30 students.
- The system will be locked if the maximum number reached, after 10 minutes from the start (consider 1min equivalent to 1 sec in your design) or if the instructor decided to lock the door."

 

use a 5-bit synchronous up/down counter to maintain the number of students currently in the classroom

So the students counter starts at 0 and counts up to 30. That makes a difference on the count that's decoded to lock the door. At any rate, it's an up/down counter.

It would be a good idea for you to post the complete text of the problem to avoid confusion.

 

So the students counter starts at 0 and counts up to 30. That makes a difference on the count that's decoded to lock the door. At any rate, it's an up/down counter.

It would be a good idea for you to post the complete text of the problem to avoid confusion.

Yes ive pretty much sent everything though.. I still don't know how to work an up/down counter frankly though, half of my semester was butchered due to the war in my country and everything was pushed into cramped dates

 

I still don't know how to work an up/down counter

Since you want to use 74LS, you have two options. I'd choose 74LS192 to have a clear option.

half of my semester was butchered due to the war in my country

Do you mind me asking what country you're in?

 

Since you want to use 74LS, you have two options. I'd choose 74LS192 to have a clear option.

Okay thank you for the recommendation

Do you mind me asking what country you're in?

Lebanon, my uni is in the capital which was being bombed so we couldn't go to our laboratory sessions and other sessions so everything was pushed into a tight schedule thus.. today

 

Lebanon, my uni is in the capital which was being bombed

You have my condolences. The World is a crazy place these days.

build it everything on Quartus

If you post anything from Quartus, turn off the grid and print to black-and-white PDF.

Are you going to actually use 74LS chips or are you going to program that Altera FPGA board that (I think) connects to Quartus.