Issue with STM32F769 PWM output when updated according to condition

Thread Starter


Joined May 24, 2019
Hello Everyone,
I am using STM32F769 Disc board with Mbed online compiler. My task is to change the PWM frequency and duty ratio according to input. i created a simple algorith according to my need, the program is working well but when ever the controller updates the PWM frequency, there is strange behavior(overlapped maybe, difficult to explain verbally for me), the frequency is changed instantly and the output is incorrect at that moment, for other controllers like aurdino, this never happens, the controller update value after the time period of PWM is over.
What can be wrong? i thought to add a small delay before value is updated but that will not work, as everytime a different delay would be needed. i have attached the code and screenshots.

#include "mbed.h"

AnalogIn analog_value(A0);
PwmOut pulse(D11);

int main()

double meas_v=0;
double out_freq,out_duty,s_time;
while(1) {

meas_v =* 3300;

else if(meas_v>=1000)

pulse.period( 1.0 / out_freq);





Joined Mar 10, 2018
You are correct, most PWMs are double buffered in their settings registers.
Both frequency and duty cycle updated at under flow or overflow. Eg. period
end. Some can do both sync and asynch via a reset pin capability or direct
writes to core PWM counter.

Manual says writing to counter produces unpredictable results for at least one
of the PWM modes.

Check further the tech manual for this part to see what it says about update, if its sync or

All PWMs I have worked with direct writes to counter result in async behavior.
Use of buffered registers convert this to a sync operation.

Regards, Dana.
Last edited:


Joined Oct 2, 2009
PWM is usually implemented using a hardware timer, it's CNT register, and capture/compare registers CCRx.
Problems will occur if you attempt to change CCRx values on the fly while the timer is running.

From the STM32F407 Reference Manual (page 543):
• When starting in center-aligned mode, the current up-down configuration is used. It means that the counter counts up or down depending on the value written in the DIR bit in the TIMx_CR1 register. Moreover, the DIR and CMS bits must not be changed at the same time by the software.
• Writing to the counter while running in center-aligned mode is not recommended as it can lead to unexpected results. In particular: – The direction is not updated if the user writes a value in the counter greater than the auto-reload value (TIMx_CNT>TIMx_ARR). For example, if the counter was counting up, it will continue to count up. – The direction is updated if the user writes 0 or write the TIMx_ARR value in the counter but no Update Event UEV is generated.
• The safest way to use center-aligned mode is to generate an update by software (setting the UG bit in the TIMx_EGR register) just before starting the counter and not to write the counter while it is running.

The solution usually requires stopping the timer and resetting the CNT register to a valid value, i.e. a value that lies in between the low and high CCRx values.

Thread Starter


Joined May 24, 2019
Thank you for your replies, I got the issue resolved, There is another library i had to include FastPWM, it resolved the issue..