So here is the function and my attempt:
Where the ' annotation means complement and Q2 is the most significant bit and Q0 the least significant bit.
I'm also trying to implement the same function but this time using only one 1*2 decoder but without much sucess. If the only entry of the decoder is Q2, pretty much most of the circuit is just using and's and or's gates without really much of the actual decoder.
Where the ' annotation means complement and Q2 is the most significant bit and Q0 the least significant bit.
I'm also trying to implement the same function but this time using only one 1*2 decoder but without much sucess. If the only entry of the decoder is Q2, pretty much most of the circuit is just using and's and or's gates without really much of the actual decoder.