Hello AAC Forums.

To cut to the chase, i have a problem with interfacing a SHARP GP2Y0A21YKOF analog output sensor to the rest of the circuit as i imagined it.
Basically, i need the circuit to perform a delayed relay activation after the IR sensor detects an obstacle infront of it, however, to only start the countdown after the obstacle has been moved.

Current setup includes an LM393 in window comparator mode, with set points being determined by a DIP switch with a resistor array to get preset distance windows in which i want the output high. Other end of the circuit is an LM556, both timers operating in falling edge triggered monostable modes to get control of delay duration, and pulse duration. Delay duration is controlled with another DIP switch with a capacitor array to get 1-10 second delay. Pulse duration is fixed at 0.5s.

Also have a single 555 timer as an "input lockout", being after the solenoid is triggered, a minimum of 5 seconds must elapse before the sensors output can be read again. (N-FET as a switch, prior to this it was a basic relay)

So i need to take the falling edge from the comparator output to trigger the 556, but only after making sure that the comparator output is high for x amount of time (to make sure it wont trigger randomly).

As it is now, the circuit triggers the moment something is in the distance range set by the first DIP switch.

I am not sure of how to approach this problem, i know it could probably be done much easier with a PIC or other microcontroller, however my programming skills are lacking. Any ideas / views are appreciated.

 

Welcome to AAC.

This is the perfect application for an MCU, you are right about that. Your programming skills may be lacking but you are spending a lot of time trying to make a convoluted logic circuit that could be used learning programming.

The truth is, with the right MCU and IDE, this problem would be only a medium difficulty for a neophyte.

I am going to make a particular suggestion: I think you should consider using an ATTiny85 MCU with the Arduino framework. You can get the chips cheap, and from many sources. You will also find that sometimes the ATTiny13A is sufficient, and when purchased from a popular distributor, they are even cheaper the the '85.

The ATTiny series is a very small, very cheap set of MCUs that are perfect for small projects. You can get them in through-hole and SMD versions. The ATTiny85 is an 8-pin package. It's like being able to create your own logic ASIC with timers and ADC/DAC facilities, and serial communications as needed. It's almost magical.

Download and install the Arduino IDE which will give you an easy to use programming environment and access to a rich set of libraries. Then you will need to add support for the ATTinyXX MCUs which is done by adding a board manager URL to the configuration using the settings menu found in the main dropdown.

The URL you need is http://drazzy.com/package_drazzy.com_index.json it will add the option for "ATTiny Core" to the board manager which you can find under the Tools dropdown under Board > Boards Manager...

Type ATTiny into the search and select ATTiny Core. You are just about set, you just need a programmer. There are many versions of this one, which is very simple. Once programmed, the only required components to use the chip are a bypass capacitor and a pull-up resistor for the RESET pin.

Yes, you will have to learn some new things, and it might seem daunting at first—but I will promise you two things:

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It's not as hard as it may appear. The initial part of the learning curve is steep because of the number of things you will have to know, not their difficulty; and, thanks to an enormous amount of online how-to documentation, you can "cheat" on that part until you have a grasp on what you are doing.​

​

Once you get the hang of it you will be in possession of a fantastic skill using a tool with open-ended possibilities. Avoiding it because it is unfamiliar and kind of scary to approach is a tragedy considered the potential.​

​

Yes, if you are not familiar with programming it is going to take some time to get comfortable but there are a huge number of tutorials focused on practical applications including text and video, so pick your poison. You can do it, I promise, and I am certain you will be amazed and pleased at the opportunities it opens up.

You can always get help here as well. Just ask questions. There are details my very brief explanation above omits that you may—or may not—need some help with. Frankly, a lot of things can just be "worked out" from context and a little reading. Once you've got a bit of a clue, explanations of the fundamentals will help you with tools that allow you to work out details yourself.

Please consider the possibility of taking the leap and making this project your first MCU-based one, of many.

 

Hello. I did take a few moments to think about using a microcontroller to do the job (do have some basic AT328P knowledge), however for this specific case, i decided to go analog. So at least for now, microcontrollers are out of the picture.
Here is the current circuit in question, reverse polarity protection is missing here, along with some other components and resistor values / diode and transistor models are placebo, wanted to share the circuit to check for feasibility first. J1 is the sensor header, H1 is solenoid header. 7805 for powering the LM393 and the 555s (two right hand side 555s are in reality a 556), 7812 for powering the solenoid (will be changed, it is not efficient this way, 7805 will probably go for a switch mode regulator too).

Missing section from R1 to Q1 is where my problem lies. Q2 is for controlling the Q4 "lockout" NFET (to disable sensor output).

First idea was another 556 , where one 555 will act as an R-S latch to disable/enable the other 555 timer until the falling edge triggers it. To be honest, i think even this is an overcomplicated solution. Possibly a D-latch setup ...

 

That's a lot of parts. I'm gonna have to re-read post #1.

Also, the Q1 base is not connected to anything.

ak

 

It looks like Q4 is a source-follower, buffering the sensor output into the comparators. Three things -

1. There is no pull-down resistor from the source to GND (or something else) so when Q2 is on and Q4 is off, the comparator inputs are completely floating. Not good.

2. If Q4 is supposed to be acting as an analog switch, I see a problem. It cannot saturate because it is acting as a source-follower, and the gate voltage cannot be enough greater than the sensor voltage to drive the FET into "saturation". The source voltage (comparator inputs) will be 1 Vgs (or 1 Vth) below Vcc if the sensor voltage is above this value., and will not track the sensor voltage for all of its range.

3. If you intend for Q4 to act as a source-follower, then - Compared to using a bipolar transistor for Q4, a FET's Vgs is much greater than a BJT's Vbe, and it is not as stable with temperature. This means that the input to the comparators will be more accurate and more repeatable if Q4 is changed to a BJT.

I think a better approach to the front end is to have the sensor drive the comparators directly and continuously, without the analog switch, and enable or disable the other circuit functions based on the comparator output, which is a logic signal and way more easy to deal with.

Next up, the retriggerable monostable.

ak

 

My read of #1 is that one thing happens when the sensor makes an output, it starts a x-second timer. This is the minimum signal duration test; you state that the input must be stable for x seconds. First question, what if it isn't? For example, let's say your minimum signal width is 0.5 s. If the sensor output is good for greater than 0.5 s, the comparator output is sent on to do great and wonderful things. If the sensor signal drops out after 0.4 s, nothing is sent forward. Fine. But what happens if the sensor signal bounces? When the sensor dropped out after 0.4 s, was the 0.5 s timer reset to 0? If so, then a series of sensor signals that were 0.4 s on / 0.01 s off never would trigger the rest of the circuit. That's probably what you want, but there is another option.

Another approach is that the leading edge of the sensor signal starts the 0.5 s discrimination timer as above, BUT - For the duration of the 0.5 s, the sensor input is ignored. At the end of the 0.5 s, the sensor is examined again. It it is valid, the trigger signal goes out to the downstream circuits. If it is low, the timer resets and waits for the next sensor input. This is how some software switch debounce routines work - after the first edge, don't care what happens for a while. Then the input is tested again. If the signal is valid, that's considered a good signal even if it was garbage in between the two samples.

These are two different approaches to a retriggerable monostable circuit, one true and one pseudo. Both are simple analog R-C timer circuits, but neither can be done with a 555 without extra parts wrapped around it. Short rant - the "monostable" function of a 555 is neither a true monostable nor a true retriggerable monostable.

ak

 

My read of #1 is that one thing happens when the sensor makes an output, it starts a x-second timer. This is the minimum signal duration test; you state that the input must be stable for x seconds. First question, what if it isn't? For example, let's say your minimum signal width is 0.5 s. If the sensor output is good for greater than 0.5 s, the comparator output is sent on to do great and wonderful things. If the sensor signal drops out after 0.4 s, nothing is sent forward. Fine. But what happens if the sensor signal bounces? When the sensor dropped out after 0.4 s, was the 0.5 s timer reset to 0? If so, then a series of sensor signals that were 0.4 s on / 0.01 s off never would trigger the rest of the circuit. That's probably what you want, but there is another option.

Another approach is that the leading edge of the sensor signal starts the 0.5 s discrimination timer as above, BUT - For the duration of the 0.5 s, the sensor input is ignored. At the end of the 0.5 s, the sensor is examined again. It it is valid, the trigger signal goes out to the downstream circuits. If it is low, the timer resets and waits for the next sensor input. This is how some software switch debounce routines work - after the first edge, don't care what happens for a while. Then the input is tested again. If the signal is valid, that's considered a good signal even if it was garbage in between the two samples.

These are two different approaches to a retriggerable monostable circuit, one true and one pseudo. Both are simple analog R-C timer circuits, but neither can be done with a 555 without extra parts wrapped around it. Short rant - the "monostable" function of a 555 is neither a true monostable nor a true retriggerable monostable.

ak

Hello. Yes, that is basically what i am after. Sensor detects something in its preset range, it must pass a certain amount of time high, and after that time window expires, the following falling edge is picked up as the trigger to start off the timing cycle.

The two 555s (556) deal with the timing and delay accurately enough, getting them to do their job with the above conditions is what i do not have a solution for. EDIT: The missing bit doesnt need to be based on a 555 at all, can be any other IC capable of doing the job, with supporting components of course.

Regarding the Q4, it is intended to work as a switch, so my bad there with the mess up.

 

As it is now, the circuit triggers the moment something is in the distance range set by the first DIP switch.

How is Q1 actually connected to the LM393?

 

How is Q1 actually connected to the LM393?

Currently its connected directly at the combined output of the LM393 to the base thru a 1k resistor. Thus, any input from the sensor triggers the circuit.

 

One change you can make is eliminating the FET and control the output from the sensor via Q2 and R15.
Adding Q4 circuit provides low pulse on Q1 when the output of the LM393 goes Low.

 

Another problem I see is the circuit of U2. Pin 2 is connected to the output of U5 which is normally Low. This makes the output High on U2 thus inhibiting the signal from the sensor all the time.
Correct 5 second timer to inhibit sensor output.

 

Let's see if I have this correct:

1. Sensor signal minimum-continuous-period discriminator, period set by dip switch and capacitor bank.

2. Output of discriminator triggers the output delay monostable *and* the lockout monostable. This prevents re-triggers occurring at the end of the output delay period, timing set by DIP switch and capacitor bank. Once these monostables are triggered, sensor activity is ignored.

3. End of output delay, 0.5 s output monostable is triggered. Lockout timer still is running, to prevent a possible false trigger when the delay timer ends.

If the lockout is triggered by the end of the delay timer or the output pulse timer, there is a possibility of the delay timer being immediately triggered when it times out, because the output of the input discriminator is sitting in the trigger state. Moving the lockout to the start of the delay period has it running continuously through both the delay and the output pulse. This makes the lockout timer longer than the sum of the delay plus the output.

If this is correct, I see one dual comparator and one CD4093 quad Schmitt Trigger NAND gate, plus some glue. I would use a 2N3904 NPN to hold the input discriminator timing capacitor at GND as the lockout condition. This means that if the input discriminator for a valid signal is set to 1 second, and the sensor signal is in a valid state for 0.8 s when the lockout is released, it sill have to stay valid for an additional 1 s before it passes the discriminator. The 0.8 s of valid signal is ignored during the lockout. Yes / No - ?

On your schematic, which 555 is making the output pulse?

ak

 

U5 is the output pulse that activates the solenoid.

 

OK, here we go.

This is a CONCEPT schematic that captures all of the requirements as I understand them with an alternate approach. I did not recreate the input and output details, power sources, etc. Most of the component values are quickie estimates.

U1 is the window comparator. With R4 and C1 it forms a true retriggerable monostable. The OP mentions a DIP switch to adjust the window voltages but didn't show one so neither did I. When the sensor voltage is within the window, both outputs go open-circuit and R4 begins to charge C1. If the sensor goes out of the window before the voltage on C1 exceeds the U2A threshold voltage, the offended comparator discharges C1 and the input discriminator timing restarts. The R4-C1 time constant probably is too small, but no value was given (or I missed it).

When Vc1 exceeds the low-to-high transition voltage of U2A, its output goes low and triggers the U2B-U2C true monostable. This circuit has positive feedback, so it ignores any input transitions while it is in its timing period. I show a DIP switch with two resistor values, but of course this can be expanded. The outputs at pins 10 and 11 are low for he delay period. At the end of the delay, the fun happens.

The monostable has two outputs, each driving a separate pulse former. This is partly so that a single CMOS output does not have to discharge two capacitors at the start of its period, and partly because I had spare gate U2D. C3-R7 forms the output pulse. C4-R8 forms the lockout timer.

It came to me that part of what I said in post #12 was incorrect. There is no time window where the delay monostable might accidentally trigger. My concern was that during the very short time between when pins 10/11 go high and when Q2 begins to clamp C1, a high voltage sitting on C1 would be a logic low at U2pin6, and the delay monostable might immediately trigger again. But it can't because C2 needs time to discharge, and this can happen only during the lockout period.

When U2Dpin11 goes high at the end of the delay period, it drives C4 to turn on Q2 and clamp the voltage across C1 near GND. No matter what happens at the sensor input, C1 is clamped for five seconds -ish. At the end of that time, Q1 releases C1 and the circuit is ready for another sensor event that exceeds the full discrimination period.

As in another post, there is another way to implement the lockout function. I can expand on that. Turns out it nothing more than a wiring change in this schematic.

Or something like that.

ak

U

 

OK, here we go.

This is a CONCEPT schematic that captures all of the requirements as I understand them with an alternate approach. I did not recreate the input and output details, power sources, etc. Most of the component values are quickie estimates.

U1 is the window comparator. With R4 and C1 it forms a true retriggerable monostable. The OP mentions a DIP switch to adjust the window voltages but didn't show one so neither did I. When the sensor voltage is within the window, both outputs go open-circuit and R4 begins to charge C1. If the sensor goes out of the window before the voltage on C1 exceeds the U2A threshold voltage, the offended comparator discharges C1 and the input discriminator timing restarts. The R4-C1 time constant probably is too small, but no value was given (or I missed it).

When Vc1 exceeds the low-to-high transition voltage of U2A, its output goes low and triggers the U2B-U2C true monostable. This circuit has positive feedback, so it ignores any input transitions while it is in its timing period. I show a DIP switch with two resistor values, but of course this can be expanded. The outputs at pins 10 and 11 are low for he delay period. At the end of the delay, the fun happens.

The monostable has two outputs, each driving a separate pulse former. This is partly so that a single CMOS output does not have to discharge two capacitors at the start of its period, and partly because I had spare gate U2D. C3-R7 forms the output pulse. C4-R8 forms the lockout timer.

It came to me that part of what I said in post #12 was incorrect. There is no time window where the delay monostable might accidentally trigger. My concern was that during the very short time between when pins 10/11 go high and when Q2 begins to clamp C1, a high voltage sitting on C1 would be a logic low at U2pin6, and the delay monostable might immediately trigger again. But it can't because C2 needs time to discharge, and this can happen only during the lockout period.

When U2Dpin11 goes high at the end of the delay period, it drives C4 to turn on Q2 and clamp the voltage across C1 near GND. No matter what happens at the sensor input, C1 is clamped for five seconds -ish. At the end of that time, Q1 releases C1 and the circuit is ready for another sensor event that exceeds the full discrimination period.

As in another post, there is another way to implement the lockout function. I can expand on that. Turns out it nothing more than a wiring change in this schematic.

Or something like that.

ak

View attachment 300209U

Hello. Yes, capacitor bank with dip switch array and and resistor array for the comparator were not pictured in the schematic. I will add them to your schematic along with missing components, and reupload the full schematic.

Hopefully should have one running on a breadboard soon enough for validation, will report back.

 

After some tinkering, i took into consideration that for the needed application of the sensor..it really isnt important if an object is detected 15cm or 65cm in front of it.

Was previously thinking of a setup like this. However, i think it is not needed.

Two voltage dividers, one to set Vhigh (~1,6V which equates to roughly 15cm distance) and Vlow (~0,5V which equates to roughly 60cm distance).

Added two LEDs for power OK and output (solenoid) active. Thought about adding two more, for sensor active (object detected) and for timing active (delay timing). Added reverse polarity protection with a PFET setup, however i will need to find an alternative for the 7805, since the circuit will most likely be powered by 24V. (Considering that the sensor draws 30mA while idle, and apparently up to 300mA in bursts, worst case is around 6,5W of heat will be dissipated on the 7805. In an enclosed case with little cooling... so no good.) C2 is added across the sensor power input pins for that reason.

Things i am not sure about is circuit power conditioning, as in filtering on the power input. Similar circuit to this one but using a microcontroller (PIC12F something) had a BNX002-01 on the board power input for that purpose.. suppose this does not need as much since it is less prone to interference ?

R3 R4 R5 R6 are there to set the delay, will be expanded to a 5-DIP switch to have for example 2s-4s-6s-8s-10s delay options. (had to change C4 to 100uF for that)

Thank you again for support, my knowledge isnt much above basic regarding this stuff, so seeing it done with "only" two ICs is cool.

 

Nowhere have you given us any guidance about how accurate / precise the four timers have to be. Note that with same external timing components, a timer using a 555 is more accurate and stable than one using a 4093. This is because the 555's Trigger and Threshold transition voltages are more tightly controlled and precise than the two transition levels in a CMOS Schmitt Trigger device.

Please list the timer value range and accuracy for each of the four timers:

Input:

Delay:

Output:

Lockout:

ak

 

Consider changing your schematic to use gate and comparator symbols. A package outline does not convey any useful information about how the circuit functions.

Also, you might want to hold off until others have reviewed my schematic. At 1:22 am, there are no warrenties expressed or implied.

ak

 

Nowhere have you given us any guidance about how accurate / precise the four timers have to be. Note that with same external timing components, a timer using a 555 is more accurate and stable than one using a 4093. This is because the 555's Trigger and Threshold transition voltages are more tightly controlled and precise than the two transition levels in a CMOS Schmitt Trigger device.

Please list the timer value range and accuracy for each of the four timers:

Input: Validation time of at least 2s, fixed value, non adjustable by DIP switches or the likes +/- .5s

Delay: 1-10s +/- .5s

Output: 0.5s fixed

Lockout: Whatever the delay is +5s +/- .5s

ak

Doesnt need to be super precise timing.. +/- 1s is adequate too.

Consider changing your schematic to use gate and comparator symbols. A package outline does not convey any useful information about how the circuit functions.

Also, you might want to hold off until others have reviewed my schematic. At 1:22 am, there are no warrenties expressed or implied.

ak

No worries, i read thru your explanation of the workings, to my knowledge nothing pops out as being flat out wrong and or imprecise..

 

Hello.

After putting together the above circuit on a breadboard, i ran into a coupe of issues:
- Circuit self triggers after the "validation" period of 2 seconds. Comparator output works as intended, but even if the output is held high, the circuit triggers the timing part. If comparator output goes low, the circuit triggers, as is supposed to be, but not immediately after the validation period is out.
- Solenoid output is constantly high, from the moment the circuit is powered on .

Have checked the connections, resistor values and such, nothing pops out. Will try another test, and report back.