So I went ahead and added an actual high side switch along with an AC analysis. As you can see the double pole at 1.59 kHz with the subsequent 40 dB/decade rolloff means this design has really lousy AC performance. I really needs better value selection along with a decent compensator to get the phase margin up.

 

I've designed and built an inverting buck-boost converter, but there is a persistent ripple that occurs on both the input and output voltage waveforms, regardless of input and output capacitor sizing. I initially thought this was due to capacitor ESR, but reducing this by placing capacitors in parallel only slightly helps reduce ripple. Any ideas on how to rectify this? I'm testing at a lower current than designed, so could maybe DCM be causing the voltage ripple?

Image 1 below is the converter output voltage at fsw=100kHz.
Channel 1 of image 2 is the drain-source voltage over the switch and channel 2 is the source voltage, which is an ideal DC when the converter is not connected.
View attachment 252729
View attachment 252730

It's also worth addressing what you are calling 'ripple' The low frequency stuff or the high frequency stuff.

The high frequency ringing on the output is due to parasitic characteristics of your L and C - and on some level there's nothing you can do about it - although 1V on a 5.85V output is pretty extreme and is due to not properly choosing your inductor and capacitor to work together.

The high frequency ringing on the input is a result of your input not being properly decoupled/filtered.

The low frequency (100kHz) ripple on the output is ~200mVpp and represents 3.42% of the output voltage and is generally considered reasonable for most power supplies. If this is still a problem then an additional LC filter is usually used to filter the output. This ripple is caused by either the ESR of the capacitor or improper layout or a combination of both. It would be helpful to see your board and layout to advise better.

Basically, I'm not seeing a huge problem here. Pretty standard stuff on the ringing - you just need to understand the video I sent and that should help a bit.

Good luck getting 100+W out of this thing. This topology is only good up to about 10-15W, without using synchronous rectification, and then it's probably only good up to 30W or so... You'll probably need to go to a feed-forward topology to get that much power out of this.

 

Simulators can of course do things that real components cannot do. I'd love to see a spice program create an animated puff of "magic smoke" when the power limits of a device are exceeded. Anything you discover by doing a simulation still has to be confirmed on the bench, but if you can't make a simulator do it you might have trouble with the real thing as well.

 

For what use is this design for?, Why did you choose this topology? Is this study-, hobby- or serious project?

 

I'd love to see a spice program create an animated puff of "magic smoke" when the power limits of a device are exceeded.

There was an old program called "Analog Workbench" which put a burning icon (not animated) next to a device whose limits were exceeded.
Obviously all the components had to have a power rating added to their models.
But I think it is no longer available.

 

There was an old program called "Analog Workbench" which put a burning icon (not animated) next to a device whose limits were exceeded.
Obviously all the components had to have a power rating added to their models.
But I think it is no longer available.

I think ltspice has this capability, but if memory serves me right it only works on dc analysis and/or a report of some kind. So it has limited usefulness.