How to design a multistage discrete BJT amplifier

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MrChips

Joined Oct 2, 2009
30,780
Should I split the gain between all three stages or just the first two? What would you recommend?
A gain of 10 in the first stage and 5 in the second will give you a total gain of 50.
The function of the output stage should be to provide power into the load with a voltage gain of 1.
 

MrChips

Joined Oct 2, 2009
30,780
Typically, a transistor might have a beta of 100 to 300.
We don’t design a single stage amplifier with that much gain. Instead, we use negative feedback which provides many advantages.

A circuit gain of 10 to 25 is very adequate for your application.
 

ericgibbs

Joined Jan 29, 2010
18,827
Hi MC,
The TS has been given a Gain figure of 50V/V ie: 50, using a 3 stage BJT amp.

The midband gain of the amplifier shall be 50 V/V

E
 

ericgibbs

Joined Jan 29, 2010
18,827
Hi MC.
That's the gain/stage ratio's I am trying to get the TS to design.
The specified BW is limited to 20Hz /18kHz.
No Input or output impedances specified.
E
 

Thread Starter

GF Oberholzer

Joined May 23, 2023
39
The last stage has to be a pnp according to the specifications so this is the design I came up with for a gain of 50.
1685024888757.png

I now need to get the correct bandwidth freqeuncy. Is that only dependent on the capacitors ?
 

MrChips

Joined Oct 2, 2009
30,780
Think positive current flow.
The arrow on the emitter shows the direction current will flow in a properly biased transistor.
 

ericgibbs

Joined Jan 29, 2010
18,827
Hi F,
It helps if you post your versions of the circuit LTSpice asc file.
Do you know how create to the AC analysis plots for the BW.?
E
 

ericgibbs

Joined Jan 29, 2010
18,827
Hi GF,
Change the .tran to this image, add the 1V AC to the V1 source details.

Add a Node label as Vin and one for Vout, using the F4 key.

Ask if you have a problem.
E
EG57_ 842.pngEG57_ 843.pngEG57_ 845.png
 
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