Multistage Amplifier Design Project

Thread Starter

MostevilJoeJoe

Joined Mar 31, 2022
6
I am trying to build a multistage amplifier (CE>CE>CC) for delivering an average power of 200mW to an 8 Ohm speaker from a microphone that produces a 20 mV peak-peak sine wave. The source resistance is 500 Ohm. Lower cutoff frequency has to be below 50 Hz and upper cutoff has to be above 20 kHz. Attached is my current circuit. The gain from the CE stages is around 160 V/V, which is great, but when the CC stage is implemented the gain drops off to about 40 V/V and the upper and lower cutoff requirements can't be met. Any tips or suggestions would be greatly appreciated. I've tried bypassed and un-bypassed emitter resistances as well as different coupling capacitor values but nothing seems to get close to the requirements and still have a stable output on the oscilloscope. Thanks!
 

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MrAl

Joined Jun 17, 2014
9,633
I am trying to build a multistage amplifier (CE>CE>CC) for delivering an average power of 200mW to an 8 Ohm speaker from a microphone that produces a 20 mV peak-peak sine wave. The source resistance is 500 Ohm. Lower cutoff frequency has to be below 50 Hz and upper cutoff has to be above 20 kHz. Attached is my current circuit. The gain from the CE stages is around 160 V/V, which is great, but when the CC stage is implemented the gain drops off to about 40 V/V and the upper and lower cutoff requirements can't be met. Any tips or suggestions would be greatly appreciated. I've tried bypassed and un-bypassed emitter resistances as well as different coupling capacitor values but nothing seems to get close to the requirements and still have a stable output on the oscilloscope. Thanks!
Hello there,

Actually the way this is done is to develop a set of equations that calculate the values of the resistors and capacitors given constraints like input impedance, output impedance, power supply voltage, and maybe desired output voltage swing.
This is not too hard to do for a single stage transistor amplifier, but obviously a three transistor circuit with so many resistors (and caps) would require more effort to develop a set of equations that optimize the design.

I could show you a single stage result (and maybe the development of the equations) but not sure if i want to do a three stage design.
It could be easier though if all the stages are capacitor coupled.

Other than that, you would have to use some trial and error i think to get a reasonable design, and remember you probably have to think about matching the output impedance of one stage to the input impedance of the next stage to some degree.

Looks like a lot of fun though, really, i might play around with this too :)
 

Thread Starter

MostevilJoeJoe

Joined Mar 31, 2022
6
I suggest you check your oscilloscope connection and check the dc bias conditions at each transistor. Have you built this circuit?
I haven't breadboarded it yet. I checked the DC operating point and it was way lower than I though it was so I might try to mess around with that more.
 

Thread Starter

MostevilJoeJoe

Joined Mar 31, 2022
6
Hello there,

Actually the way this is done is to develop a set of equations that calculate the values of the resistors and capacitors given constraints like input impedance, output impedance, power supply voltage, and maybe desired output voltage swing.
This is not too hard to do for a single stage transistor amplifier, but obviously a three transistor circuit with so many resistors (and caps) would require more effort to develop a set of equations that optimize the design.

I could show you a single stage result (and maybe the development of the equations) but not sure if i want to do a three stage design.
It could be easier though if all the stages are capacitor coupled.

Other than that, you would have to use some trial and error i think to get a reasonable design, and remember you probably have to think about matching the output impedance of one stage to the input impedance of the next stage to some degree.

Looks like a lot of fun though, really, i might play around with this too :)
If you don't mind doing a single stage result I would really appreciate it! And are the stages not already capacitor coupled with the 20 uF caps? Or is that something else?
 

MrChips

Joined Oct 2, 2009
27,692
Interstage coupling capacitor makes up a high-pass filter. Calculate the roll off frequency by paying attention to the resistance of the load.
You need to pay attention to input and output impedances. Your base bias resistor values were chosen with no attention paid to the required base current.

Why build a 3-stage class A amplifier when a class B push-pull output is much better.

1648837790776.png
 

Audioguru again

Joined Oct 21, 2019
5,419
It looks like datasheet specs for the transistors were not used and calculations were not done for the circuit that is shown.
The output transistor will not work since its base current is more than one thousand times too low and if it worked the little transistor would burn up. Here is what i calculated:

1648865208014.png
 

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Thread Starter

MostevilJoeJoe

Joined Mar 31, 2022
6
Hi Most,
This is what LTspice shows for your circuit.
Check the stage biassing.
Rework and repost your circuit.
E
Updated the design. Gain is about 21 V/V (432mV peak output), which is low, but I think I've figured out how to raise it more. Lower cutoff seems to be correct at 50 Hz, but I'm a little worried about a few things. I'm not sure that the 92 uF capacitor would have a good result when I go to breadboard it, and someone else in the thread said that because of the low base resistances, the transistors would just end up burning up. Is this accurate? The Multisim output seems to have stable and undistorted waveforms, but I'm not sure if I will get the same result in real life.
 

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MrChips

Joined Oct 2, 2009
27,692
You need to understand why there are three stages. You need to design each stage to match input and output impedance and power requirements.

Stage 1 - the preamp
The purpose of the preamp is to take a low amplitude signal with high input impedance to produce high amplification with moderate output impedance.

Stage 2 - the driver
The purpose of the driver stage is to take a moderate signal with medium input impedance and drive the power amp that has low input impedance and needs high current drive.

Stage 3 - the power amp
Its purpose is to drive power (high current) into a low impedance speaker. For this you want the output impedance of the power amp to be very low.
 

Thread Starter

MostevilJoeJoe

Joined Mar 31, 2022
6
You need to understand why there are three stages. You need to design each stage to match input and output impedance and power requirements.

Stage 1 - the preamp
The purpose of the preamp is to take a low amplitude signal with high input impedance to produce high amplification with moderate output impedance.

Stage 2 - the driver
The purpose of the driver stage is to take a moderate signal with medium input impedance and drive the power amp that has low input impedance and needs high current drive.

Stage 3 - the power amp
Its purpose is to drive power (high current) into a low impedance speaker. For this you want the output impedance of the power amp to be very low.
I guess I'm a little unsure of how to do the impedance matching. Is it just Rin and Rout of each stage? Or is it more complicated than that?
 

MrChips

Joined Oct 2, 2009
27,692
Sorry, I should not have used the word “match” which implies making the two the same.

In this application you want the preceding stage output impedance to be lower than the input impedance of the next stage.
 

ericgibbs

Joined Jan 29, 2010
16,803
Hi Most,
To get the specified 200mWatt Average power across the 8R load, with a 12Volt supply, this simulation of the output Stage gives an indication that the 2N2222A power output transistor is seriously overloaded.
As rough indication, a ~3.6Vppk swing is required to get the 200mW average across the 8R

To get the required 20 mV peak-peak sine wave amplified to 3.6Vppk means a gain of ~180 in the first two Stages.

Who set the question and can you confirm that you have posted the correct required specification.
E

EEG 1530.gif
 

Thread Starter

MostevilJoeJoe

Joined Mar 31, 2022
6
Hi Most,
To get the specified 200mWatt Average power across the 8R load, with a 12Volt supply, this simulation of the output Stage gives an indication that the 2N2222A power output transistor is seriously overloaded.
As rough indication, a ~3.6Vppk swing is required to get the 200mW average across the 8R

To get the required 20 mV peak-peak sine wave amplified to 3.6Vppk means a gain of ~180 in the first two Stages.

Who set the question and can you confirm that you have posted the correct required specification.
E

EView attachment 264096
The specifications are right. When I did my original calculations, I did see that a gain of 181 would meet the power requirements, but I did a lower gain at first because I couldn't get a higher gain to work. Raising the base resistances for the output stage would help with the overloading, correct?
 

MrChips

Joined Oct 2, 2009
27,692
It would be instructive to see the actual question and the context.
It depends on how detailed is the question and the expected answer.

For example, 200mW average power into 8Ω has an exact definition. Average does not mean a ball-park figure.
Do you know how to calculate the peak-to-peak voltage of a sinewave in order to represent this power?
 

BobTPH

Joined Jun 5, 2013
6,080
Why are you using a 4.7K collector resistor on the first stage and 9K on the second? It should be the opposite. Later stages will handle more current, which means a lower collector resistor. I would use about 10K in the fist stage and maybe 2.2K in the second.

And why are you not bypassing the emitter resistors? You will get way more gain if you do.

And I concur with everone else about the output stage. You don’t not want a class A stage.

Bob
 
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