Homework help!

Thread Starter

Sam1990

Joined Feb 15, 2015
2
Hi
I am stuck at a problem in ASIC digital design: please help me out
the problem is
1]
This is a design question. Please design a counter that counts the number of times the number “5” appears in a 4-bit input stream. The I/O is as follows:
NumberIn: 4-bits wide (input)
Start: Reset counter and overflow flag to zero while start is high (input)
Count: 8-bit unsigned count (of the number of “5”s that have occurred since start went low (output)
Overflow: Goes high if count overflows (count is unsigned, so you only need to monitor the adder carry out) and stays high until reset is asserted.
I want to see a Register Transfer Level (RTL) schematic. Design this functional unit at the RTL level. An adder is required – you can represent this as a “+” unit – no need to design its detail. There is no need to optimize the design.
The only flip-flop you can use is a D flip-flop, and its clock input can only be connected to “clock”. You can NOT use a flip-flop with preset or clear.
An exemplar timing diagram can be found below (x=unknown).

upload_2015-2-15_0-13-42.png
 

WBahn

Joined Mar 31, 2012
29,976
Break it into subproblems and then solve each of those in turn.

You know that you need a circuit that counts whenever a particular event is seen. So make a circuit that counts only when a control signal is asserted and make another circuit that asserts a control signal only when the particular event is seen.
 

MrChips

Joined Oct 2, 2009
30,707
A title "Homework Help!" is no good to anyone.

"How to count occurrences of a number in input stream?" is more descriptive of the thread.
 
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