dual trigger, 1st trigger starts timer second trigger must be within timer to set output

Thread Starter

philipbutler

Joined Mar 21, 2018
8
Hi guys,
I'm sure there is a better way of describing my circuit but I can't think on one at present.
Brief
Two inputs, one delayed output!
scenario
Input 1 is triggered (lets say a 1 second pulse from 0 -> 5v -> 0)
this starts a 3 second timer
If input 2 is triggered within this time period then the output is enabled for 5 seconds.

Primary components
1 x 556 timer
1 x 4081 Quad AND gate
1x transistor of some sort to drive the relay
several resistors, a few capacitors and the odd diode for good measure!

The theory being:
Trigger 1 goes into one input of a 556 timer that sets a 2 second pulse on the output which goes to an input of the AND gate
Trigger 2 goes to the other input of the AND gate
If both inputs are high, we get an output that goes to the second input of the 556 timer. The output of this timer is used to turn on a relay for 3 seconds.

Sorry for the really bad explanation but hopefully you get the gist.
Before I start on a circuit design I just wanted to find out if there is a far better solution to the one above.
Cheer, Philip
 

ericgibbs

Joined Jan 29, 2010
16,030
Hi philip,
Welcome to AAC.
Your descriptions sounds OK to me, you will need a transistor on the 2nd mono in order to drive a relay.
Post your circuit.
E
 

Thread Starter

philipbutler

Joined Mar 21, 2018
8
Hi philip,
Welcome to AAC.
Your descriptions sounds OK to me, you will need a transistor on the 2nd mono in order to drive a relay.
Post your circuit.
E
Cheers Eric, yeah, I'd added the transistor to my component list but forgot to put it in the description. Based on your OK, (thanks by the way) I'll start designing the circuit and post it here for review if that's okay.
 

WBahn

Joined Mar 31, 2012
26,920
Hi guys,
I'm sure there is a better way of describing my circuit but I can't think on one at present.
Brief
Two inputs, one delayed output!
scenario
Input 1 is triggered (lets say a 1 second pulse from 0 -> 5v -> 0)
this starts a 3 second timer
If input 2 is triggered within this time period then the output is enabled for 5 seconds.

Primary components
1 x 556 timer
1 x 4081 Quad AND gate
1x transistor of some sort to drive the relay
several resistors, a few capacitors and the odd diode for good measure!

The theory being:
Trigger 1 goes into one input of a 556 timer that sets a 2 second pulse on the output which goes to an input of the AND gate
Trigger 2 goes to the other input of the AND gate
If both inputs are high, we get an output that goes to the second input of the 556 timer. The output of this timer is used to turn on a relay for 3 seconds.

Sorry for the really bad explanation but hopefully you get the gist.
Before I start on a circuit design I just wanted to find out if there is a far better solution to the one above.
Cheer, Philip
Your two descriptions seem contradictory in terms of the actual time values involved.

Initially the first trigger opens a 3-second window but at the bottom it opens a 2 second window. Then up top the second input results in a 5 second output but in the bottom it's just three seconds.

What you are trying to do conceptually seems pretty clear and straightforward, but you might consider making a timing diagram showing the various relationships.

Depending on other factors, the "far better" solution would likely be a small, cheap, 8-pin microcontroller. But there is learning and hardware overhead that would not make this attractive if this is the only thing you would ever do with it. But if there are other things you would like to do, then a microcontroller-based approach quickly becomes worth the startup hassle.
 

joeyd999

Joined Jun 6, 2011
4,477
Sorry for the slightly off topic post, but your specification reminded me of a (simplified) version of a project detailed in an article from the March/April 1978 issue of Elementary Electronics. I remember I read the article about a hundred times, and while I no longer have the issue, I can still remember the smell of the pages it was printed on.

Here's the issue. The article begins on page 34: "Telephone Trigger". It may even be helpful to you.
 

AnalogKid

Joined Aug 1, 2013
10,113
This can be done with a single CMOS hex inverter with Schmitt trigger inputs - CD40106 (or 74hc14 in 5 V systems) - plus a few diodes and an output transistor.

ak
 

Thread Starter

philipbutler

Joined Mar 21, 2018
8
Your two descriptions seem contradictory in terms of the actual time values involved.

Initially the first trigger opens a 3-second window but at the bottom it opens a 2 second window. Then up top the second input results in a 5 second output but in the bottom it's just three seconds.

What you are trying to do conceptually seems pretty clear and straightforward, but you might consider making a timing diagram showing the various relationships.

Depending on other factors, the "far better" solution would likely be a small, cheap, 8-pin microcontroller. But there is learning and hardware overhead that would not make this attractive if this is the only thing you would ever do with it. But if there are other things you would like to do, then a microcontroller-based approach quickly becomes worth the startup hassle.
You spotted my deliberate mistake! ;-) Input 1 opens a 3 second window and the output from the second 555 that drives the relay should be 5 seconds not 3 seconds. Creating a timing diagram was a good call (see attached) as It has also identified that I need to make sure it only triggers on the rising edge which would not achieve this. Am i correct in thinking a D-type flip-flow would achieve this?
 

Attachments

Thread Starter

philipbutler

Joined Mar 21, 2018
8
This can be done with a single CMOS hex inverter with Schmitt trigger inputs - CD40106 (or 74hc14 in 5 V systems) - plus a few diodes and an output transistor.

ak
I've just had a look at the 74hc14 but no light bulb came on I'm afraid! is this solution still viable given the waveforms that I posted in reply to @WBahn ?
[EDIT] I google 'substituting a 555 timer with a 74hc14 schmitt trigger and found a good article. http://www.talkingelectronics.com/pay/BEC-2/Page49.html [/EDIT]
 
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AnalogKid

Joined Aug 1, 2013
10,113
A flipflop is not the right component for this. What you describe is two monostables. One makes the output pulse whenever it is triggered. Its trigger is gated (allowed to happen) by another monostable. In code:

IF input 1 has started timer one
AND IF timer one has not ended
AND IF input 2 has gone from low to high
THEN make an output pulse

ak
 

danadak

Joined Mar 10, 2018
4,057
Are the inputs "clean" logic signals or do they need to be
debounced ? Stated another way are the signals from
mechanical switches, like push button, toggle switch,
relay contacts .....?


Regards, Dana.
 

Thread Starter

philipbutler

Joined Mar 21, 2018
8
Are the inputs "clean" logic signals or do they need to be
debounced ? Stated another way are the signals from
mechanical switches, like push button, toggle switch,
relay contacts .....?


Regards, Dana.
hi Dana, thanks for your feedback, both inputs are from 'Obstacle Avoidance IR Sensors' that I've just ordered from ebay, the output of which goes to ground upon the presence of an object.
 

AnalogKid

Joined Aug 1, 2013
10,113
hi Dana, thanks for your feedback, both inputs are from 'Obstacle Avoidance IR Sensors' that I've just ordered from ebay, the output of which goes to ground upon the presence of an object.
Well, so much for my initial schematic. That logic polarity is the opposite of what is shown in your timing diagram. Please update the timing diagram to show the correct edge direction coming into each input.

Also:

What is the power supply voltage for the logic circuit?
What is the power supply voltage for the output device (relay?)?
What is the current required for the output device?

ak
 

AnalogKid

Joined Aug 1, 2013
10,113
Here is a single-chip solution for the problem described in post #1. It requires no programming and no 555's. It will change when the questions in post #14 are answered.

ak
Pulse-Enable-Window-1-c.gif
 

Thread Starter

philipbutler

Joined Mar 21, 2018
8
Well, so much for my initial schematic. That logic polarity is the opposite of what is shown in your timing diagram. Please update the timing diagram to show the correct edge direction coming into each input.

Also:

What is the power supply voltage for the logic circuit?
What is the power supply voltage for the output device (relay?)?
What is the current required for the output device?

ak
Morning Dana, I'm so sorry for the confusion, I realised myself whilst lying in bed that the waveforms did not match the outputs from the infrared sensors. I've updated the waveform to reflect the ground falling edge trigger. I've left the outputs as going high, but the end of the day it doesnt matter as it is turning on a transistor to drive a relay so I can either do that with a high or a low.
Both the logic circuit and relay are 5 volts. The output from the relay was going to be a servo motor but after reading the spec of the servo I've realised that it needs a PWM to drive it which to be hones at the moment is beyond my knowledge so the relay will probably drive a 12v geared motor (or I may just see if I can strip the servo apart so as it behaves like a normal geared motor).
The key thing with the solution is.... I must understand how it works; I don't really want to build a circuit that works but I have no idea how it does it. Thanks for everyones support, it's really appreciated.
 

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AnalogKid

Joined Aug 1, 2013
10,113
I google 'substituting a 555 timer with a 74hc14 schmitt trigger and found a good article. http://www.talkingelectronics.com/pay/BEC-2/Page49.html
The Schmitt Trigger is a great thing to understand. It allows all kinds of fun things with relatively few parts. One of it's most common uses is in "cleaning up" very slow edges going into logic circuits.

Internally, a standard logic gate is simply a very high gain linear amplifier with a DC bias point at the input. For this slightly oversimplified example, lets say the internal gain of a CMOS inverter is 1000 and the internal input bias point is 50% of the power supply input voltage (Vdd/2 for CMOS), and Vdd = 5.0 V. When the input is 2.497 V or less, the output is saturated high, and when the input is 2.503 V or more, the output is saturated low.

But, when the input is 2.499 V (1 mV below the bias point), the output is 3.5 V (1 V above the bias point). That is 1 mV x 1000, plus the 2.5 V internal bias voltage, and that is a problem because the output no longer is saturated. If there is +/-2 mV of noise (not very much) on a 2.500 V signal, the output now is swinging from 0.5 V to 4.5 V, basically a small AM radio transmitter. AND it is sending high speed false ones and zeroes and transitions to downstream logic circuits. Not good. Also, not usually a problem, because when the input is transitioning past 2.499 volts very quickly, such as when the input is a logic edge with a 1 us risetime, the inverter cannot respond fast enough in the few nanoseconds when it is its linear amplifier region to make a noise burst. But, what if the risetime is 1 second, a million times slower, such as the capacitor voltage in a multi-second timer circuit. oops. Now the input is spending many milliseconds inside the linear region, and the output will go nuts.

Enter Otto Schmitt. With a little positive feedback from the output to a non-inverting point somewhere near the input, the input transition level now becomes partly dependent on the current state of the output. Instead of one transition level (bias point) of 2.5 V, there now are two, at 2.0 V and 3.0 V. If the input is low and the output is high, the transition level is 3.0 V. No matter how fast or slow the input edge is, when it reaches 3.000001 V the output goes low. In that instant, the input transition level changes to 2.0 V. So even though it took only a 1 uV noise tick to be seen as a logic 1, it now takes a downward change of 1 entire volt to be seen as a logic zero. The one full volt is called noise immunity, and it is huge.

Not only does this "clean up" slow edges by making them noise-immune, it has other uses. An external feedback circuit that has a time delay, like an R-C network, turns the inverter into an oscillator. To be clear, it is not a great oscillator because the two input transition levels are not tightly specified and wander around with temperature. But if you don't need precision, you can get six square wave oscillators out of one hex inverter for pennies.

For some timer circuits with a 2-5 second output pulse, a Schmitt trigger gate would be almost mandatory. But a true monostable has 100% positive feedback externally, so normal gates work just fine.

ak
 
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AnalogKid

Joined Aug 1, 2013
10,113
The multivibrator circuit dates back to 1919. It is a type of relaxation oscillator with two saturating or clipping inverting amplifiers as the circuit core. Depending on the cross-connections between the two devices, there are three basic types:

Astable - unable to remain indefinitely in either state - an oscillator

Bistable - able to remain indefinitely in either state - a latch

Monostable - able to remain indefinitely in only one state - a pulse circuit. A monostable starts in its resting state, is triggered to change states, and after a defined time period returns to the resting state.

Two basic types of monostables are a true monostable, where the output is independent of whatever happens to the input after it is initially triggered, and retriggerable. If a retriggerable circuit is re-triggered while in the middle of the timed state, the timing starts over at zero and the output condition is extended. For example, if the timer is designed for 5 seconds and it is retriggered at 3 seconds, the output will remain true continuously for 8 seconds. We don't want that here. Or do we?

A key characteristic of a true monostable is positive (non-inverted) feedback from the output to the input. Once triggered, the output "shuts off" the input and ignores any input transitions during the timing period. I have two of these in your circuit, because your description of the task does not mention what the output should do if there are multiple triggers.

Example: You have two inputs, an enable trigger and an output trigger. The enable trigger opens a 3 second window. But what should happen to that window if the enable trigger goes high and then low again after only 2 seconds? Should the window stay at 3 seconds from the initial trigger, or restart to be three seconds from the latest trigger for a total window time of 5 seconds?

Same for the 5 second output pulse. What should it do if there are multiple output trigger signal transitions during the 2 second enable window, hold to 5 seconds from the first one, or extend each time an additional trigger is received within the enable window?

ak
 
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AnalogKid

Joined Aug 1, 2013
10,113
Next pass at a schematic - monostable, diode-OR gate, differentiator, monostable, output driver. Note that this schematic uses Schmitt trigger gates only because I like them. The standard 4011 NAND gate will work, although timing resistors R1 and R2 will increase slightly for the same periods. With a 5 V Vdd, the two input thresholds are 2.05 V and 2.95 V. These are approximately 89% of the R-C voltage at exactly 1 time constant, so R1 and C1 are the standard 5% values closest to 300K and 500K plus 10%

U1A-U1B and U1C-U1D form monostables. C-D is drawn differently to show the path from the Output Trigger to the relay driver more clearly. The only difference between the two circuits is the timing resistor value. The circuit assumes that both inputs rest at or near 5 V, *not* an open circuit; if the inputs float, we add pull up resistors.

No matter what the state of C1 is, eventually R1 will pull the U1B inputs to GND. So in the resting state, U1B pin4 is high, pin1 is high, pin2 is high because that is the rest state of the sensor, so pin3 is low and there is no charge in C1. When pin 2 goes low, pin 3 goes high, yanking up pins 5 and 6. Pin 4 goes low, pulling pin 1 low. U1A is a NAND gate, so as long as pin 1 is low all activity on pin 2 is ignored. This is why the output is independent of the input. As C1 charges through R1, the voltage at pins 5 and 6 decreases until it crosses the lower threshold of U1B. When this happens, pin 4 snaps high and the output pulse ends.

D1-D2-R3 form an OR gate. As long as either input is high, there is a high voltage across R3. The voltage on R3 goes low only when both diode anodes are low. The De-Morgan transformation of an OR gate is an inverted input NAND gate. So in negative-true logic, the output (the voltage at R3) is low (true) only when both inputs D1 AND D2 are low (a negative-true AND function). This is the AND function that makes the enable pulse control when the Output Trigger can reach the second monostable output timer.

Let's skip the differentiator for now.

U1C-U1D form the output pulse timer. The operation is exactly the same as before. A NAND gate monostable makes a negative-going timing pulse, and it takes a positive voltage to turn on an NPN transistor or n-channel MOSFET, so inversion is needed. Rather than add a 2nd MOSFET in series as an inverting stage, I used the internal "other output" in the monostable. The logic polarity is correct (it is a positive-going pulse) and the gate can drive both the timing capacitor and Q1 gate together - BUT - this output has some baggage.

Going back to the U1A-B circuit, I said the output pulse width is independent of what happens at the input. That is not true for the status of pin 3, the "other output". If the input at pin 2 is held low *longer than the timing period*, and still is low when pin 4 goes high, then pin 3 stays high. C1 is happy and pin 4 is happy and the downstream circuits are happy, but pin 3 has not returned to the rest state and C1 is not discharging through R1. Moving to the output pulse circuit, this means that if the Output Trigger signal stays low longer than 5 seconds, the signal at pin 10 will stay high and the relay will stay closed. The solution is to extract only the leading edge (the only part we care about) from the Output Trigger signal in a way that ignores it's long-term state. C4 and R4 do this by differentiating the negative edge in a way that is similar to the way the series capacitor/shunt resistor work in the monostable, but without the feedback.

During an enable window, when the Output Trigger signal goes low the voltage on R3 goes low, pulling down C4. Because the pullup resistor R4 is 10x the value of R3, the voltage at pin 8 is initially pulled low, then wanders up as R4 charges C4. Not that the wandering up time is less than 100 milliseconds, plenty long enough to trigger the output monostable. Once C4 is charged, the Output Trigger signal can stay low as long as it wants, but pin 8 will be high when pin 9 goes high at the end of the output pulse. This will drive pin 10 low, turning off the relay.

ak
Pulse-Enable-Window-2-c.gif
 
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