Hi,
The DC is removed, the Vout swings above and below zero volts OK.
E
View attachment 349513

i swear how complex is electronics to me? but satisfying

 

Look

 

Differential amplifier with active load

Hello, im simulating this circuit that is similar to the differential amplifier, but this time the collector current is given by a current mirror circuit.

But there are multiple things that i dont understand, like how u calculate the gain of this circuit? and how i set a precise gain?

The collector current depends on the costant current generator at the bottom? like if i set a costant current generator of 4mA, then i will have that current mirror will generate 2mA on both ic lines?

 

It would be helpful if you could show us the circuit (not only as an asc file)

 

It would be helpful if you could show us the circuit (not only as an asc file)

sure!

 

Thank you for the drawing.
In the following I can give you a - more or less - qualitative answer.
It will consist not of a detailed derivation, but i will make use of the well-known expressions which are valid for the "classical" differential pair with two equal resistors in the collector path.

It is the aim of each designer to make the diff. pair as symmetrical as possible.
Therefore, you are right that the current source in the common emitter path (4mA) will cause a quiescent DC current of 2mA in both transistors (Q3 and Q4).

(1) With two equal resistors Rc in the collector path the differential gain - related to collector node of Q3 - will be
Ad=Vout/Vd= gm*Rc/2 (with transconductance gm=Ic/Vt and Vd=V3-V5).
This expression can be found in all relevant contributions dealing with diff. amplifiers. It is valid for zero common mode gain (ideal CMRR) which is true for the shown circuit (ideal current source in the emitter path).

(2) When we replace the resistors Rc with a current mirror we have two advantages:
* The differential gain is doubled because of the current mirror which tries to hold both collector currents equal, and
* the gain is much much larger due to the very large dynamic (differential) resistance rce of the internal rce of the transistors Q1 and Q2 (if compared with Rc).

As a consequence, we can write: Ad=gm*rce.
But the collector-emitter diff. resistance rce is very large and - in general - unknown.

But in nearly all applications the output is connected to a load RL (often another transistor).
Therefore, this load RL acts in parallel to rce - and it is allowed and sufficient exact to write (rce>>RL):

Ad=gm*RL

 

Thank you for the drawing.
In the following I can give you a - more or less - qualitative answer.
It will consist not of a detailed derivation, but i will make use of the well-known expressions which are valid for the "classical" differential pair with two equal resistors in the collector path.

It is the aim of each designer to make the diff. pair as symmetrical as possible.
Therefore, you are right that the current source in the common emitter path (4mA) will cause a quiescent DC current of 2mA in both transistors (Q3 and Q4).

(1) With two equal resistors Rc in the collector path the differential gain - related to collector node of Q3 - will be
Ad=Vout/Vd= gm*Rc/2 (with transconductance gm=Ic/Vt and Vd=V3-V5).
This expression can be found in all relevant contributions dealing with diff. amplifiers. It is valid for zero common mode gain (ideal CMRR) which is true for the shown circuit (ideal current source in the emitter path).

(2) When we replace the resistors Rc with a current mirror we have two advantages:
* The differential gain is doubled because of the current mirror which tries to hold both collector currents equal, and
* the gain is much much larger due to the very large dynamic (differential) resistance rce of the internal rce of the transistors Q1 and Q2 (if compared with Rc).

As a consequence, we can write: Ad=gm*rce.
But the collector-emitter diff. resistance rce is very large and - in general - unknown.

But in nearly all applications the output is connected to a load RL (often another transistor).
Therefore, this load RL acts in parallel to rce - and it is allowed and sufficient exact to write (rce>>RL):

Ad=gm*RL

Ok i understood, but this gain is uncontrollable so?

And me as designer what i can do is making both ic as similar as possible, but there isnt much i need to know for this circuit no?

 

Ok i understood, but this gain is uncontrollable so?

The transconductance gm=Ic/Vt is directly propoertional to the current source in the common emitter path.